Impact of Transistor Aging on the Reliability of the Analog Circuit

Abstract

Transistor aging affects has become a serious reliability issue in today’s deep submicron technology. With continuous scaling of transistor size along with process variation negative-bias temperature instability (NBTI) nowadays has become a serious reliability concern in analog and mixed-circuits. Due to NBTI induced increase in threshold voltage, analog circuit undergoes heavy performance degradation; as a result, their lifetime reduces. Op-amp is the basic building block of the Analog circuit. In earlier works, it has been observed that NBTI degradation is considerable when the op-amp circuit is used as a comparator. Also some circuits like buffer, current-steering DAC are affected due to aging. In this work, we have analyzed the aging effect on these circuits. We have also proposed a technique that mitigates NBTI degradation and increases the lifetime of the comparator. This technique increases the lifetime of comparator up to 4 years with negligible power overhead. This technique can be applied to other analog circuits also, which are affected due to NBTI. The simulation is done using cadence relxpert in UMC 28nm technology.