A design of the frequency synthesizer for DRM/DAB/AM/FM application in 0.18 µm RF CMOS process

Abstract

This paper describes a frequency synthesizer for DRM/DAB/AM/FM application using 0.18µm CMOS process. The frequency synthesizer operates in the multi-band, including DRM, DAB, AM, and FM. To cover the overall frequencies of them, a novel frequency planning and a new structure are proposed. The monolithic DRM/DAB frequency synthesizer chip is also fabricated in a SMIC's 0.18 µm CMOS process. The die area is 1425 µm×795 µm (include test buffer and pads). The measured results show that phase noise in PLL loop is •59.52dBc/Hz at 10 kHz offset, the measured phase errors of LO quadrature signals is less than 3°. The proposal frequency synthesizer consume 47 mW (include test buffer) under a 1.8 V supply.