Hardware implementation aspects of Multi-Step Look-Ahead Σ-Δ modulation-like architectures for all-digital frequency synthesis applications

Abstract

This work discusses hardware implementation considerations for a novel Multi-Step Look-Ahead modulation architecture which improves on the stability and dynamic range of conventional Σ-Δ modulators for all-digital frequency synthesis applications. The basic theoretical concepts of the architecture are analyzed and an appropriate general hardware implementation of the required mathematical operations is presented. It is shown that hardware complexity reduction is possible when noise-shaping filters with convenient coefficients are utilized. Moreover, FPGA and IC implementation examples for a specific noise-shaping filter are given, accompanied by power, area and delay estimations.