$\mathsf{CHOAMP}$ : Cost Based Hardware Optimization for Asymmetric Multicore Processors

Jyothi Krishna Viswakaran Sreelatha;Shankar Balachandran;Rupesh Nasre
{"title":"$\\mathsf{CHOAMP}$ : Cost Based Hardware Optimization for Asymmetric Multicore Processors","authors":"Jyothi Krishna Viswakaran Sreelatha;Shankar Balachandran;Rupesh Nasre","doi":"10.1109/TMSCS.2018.2791955","DOIUrl":null,"url":null,"abstract":"Heterogeneous Multiprocessors (HMPs) are popular due to their energy efficiency over Symmetric Multicore Processors (SMPs). Asymmetric Multicore Processors (AMPs) are a special case of HMPs where different kinds of cores share the same instruction set, but offer different power-performance trade-offs. Due to the computational-power difference between these cores, finding an optimal hardware configuration for executing a given parallel program is quite challenging. An inherent difficulty in this problem stems from the fact that the original program is written for SMPs. This challenge is exacerbated by the interplay of several configuration parameters that are allowed to be changed in AMPs. In this work, we propose a probabilistic method named CHOAMP to choose the bestavailable hardware configuration for a given parallel program. Selection of a configuration is guided by a user-provided run-time property such as energy-delay-product (EDP) and CHOAMP aspires to optimize the property in choosing a configuration. The core part of our probabilistic method relies on identifying the behavior of various program constructs in different classes of CPU cores in the AMP, and how it influences the cost function of choice. We implement the proposed technique in a compiler which automatically transforms a code optimized for SMP to run efficiently over an AMP, eliding requirement of any user annotations. CHOAMP transforms the same source program for different hardware configurations based on different user requirement. We evaluate the efficiency of our method for three different run-time properties: execution time, energy consumption, and EDP, in NAS Parallel Benchmarks for OpenMP. Our experimental evaluation shows that CHOAMP achieves an average of 65, 28, and 57 percent improvement over baseline HMP scheduling while optimizing for energy, execution time, and EDP, respectively.","PeriodicalId":100643,"journal":{"name":"IEEE Transactions on Multi-Scale Computing Systems","volume":"4 2","pages":"163-176"},"PeriodicalIF":0.0000,"publicationDate":"2018-01-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TMSCS.2018.2791955","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Multi-Scale Computing Systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/8254393/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

Abstract

Heterogeneous Multiprocessors (HMPs) are popular due to their energy efficiency over Symmetric Multicore Processors (SMPs). Asymmetric Multicore Processors (AMPs) are a special case of HMPs where different kinds of cores share the same instruction set, but offer different power-performance trade-offs. Due to the computational-power difference between these cores, finding an optimal hardware configuration for executing a given parallel program is quite challenging. An inherent difficulty in this problem stems from the fact that the original program is written for SMPs. This challenge is exacerbated by the interplay of several configuration parameters that are allowed to be changed in AMPs. In this work, we propose a probabilistic method named CHOAMP to choose the bestavailable hardware configuration for a given parallel program. Selection of a configuration is guided by a user-provided run-time property such as energy-delay-product (EDP) and CHOAMP aspires to optimize the property in choosing a configuration. The core part of our probabilistic method relies on identifying the behavior of various program constructs in different classes of CPU cores in the AMP, and how it influences the cost function of choice. We implement the proposed technique in a compiler which automatically transforms a code optimized for SMP to run efficiently over an AMP, eliding requirement of any user annotations. CHOAMP transforms the same source program for different hardware configurations based on different user requirement. We evaluate the efficiency of our method for three different run-time properties: execution time, energy consumption, and EDP, in NAS Parallel Benchmarks for OpenMP. Our experimental evaluation shows that CHOAMP achieves an average of 65, 28, and 57 percent improvement over baseline HMP scheduling while optimizing for energy, execution time, and EDP, respectively.
$\mathsf{CHOAMP}$:基于成本的非对称多核处理器硬件优化
异构多处理器(HMP)由于其优于对称多核处理器(SMP)的能效而广受欢迎。不对称多核处理器(AMP)是HMP的一种特殊情况,不同类型的核共享相同的指令集,但提供不同的功率性能权衡。由于这些核心之间的计算能力差异,找到用于执行给定并行程序的最佳硬件配置是非常具有挑战性的。这个问题的固有困难源于原始程序是为SMPs编写的。AMP中允许更改的几个配置参数的相互作用加剧了这一挑战。在这项工作中,我们提出了一种名为CHOAMP的概率方法来为给定的并行程序选择最佳可用的硬件配置。配置的选择由用户提供的运行时特性(例如能量延迟乘积(EDP))来指导,并且CHOAMP希望在选择配置时优化该特性。我们概率方法的核心部分依赖于识别AMP中不同类别CPU核心中各种程序结构的行为,以及它如何影响选择的成本函数。我们在编译器中实现了所提出的技术,该编译器自动转换为SMP优化的代码,使其在AMP上高效运行,从而消除了任何用户注释的要求。CHOAMP根据不同的用户需求,为不同的硬件配置转换相同的源程序。在OpenMP的NAS并行基准测试中,我们评估了我们的方法在三种不同运行时属性下的效率:执行时间、能耗和EDP。我们的实验评估表明,CHOAMP在优化能量、执行时间和EDP的同时,比基线HMP调度平均提高了65%、28%和57%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信