Studies on Phase Noise Profiles of Proportional-Integral-Derivative Controlled PLL

Q2 Computer Science
G. Konwar, T. Bezboruah
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引用次数: 7

Abstract

Phase noise in a phase-locked loop is originated from reference oscillator, phase detector, loop filter, voltage controlled oscillator and frequency divider which make the system unstable by generating high phase noise at the output spectrum. In this work, a mathematical linear phase noise model is therefore developed to investigate the effect of reference noise, phase detector noise, voltage controlled oscillator noise, frequency divider noise and specifically the loop filter noise. For this purpose, the conventional active or passive low pass filter of the phase locked loop is replaced by a proportional-integral-derivative controller during acquisition. The noise problem of each component is formulated as a transfer function derived from linear analysis of the proposed mathematical noise model. The simulation results show that the effect of noise attenuation of voltage controlled oscillator is -40dB/decade while the noise attenuation of the reference noise, phase detector noise, proportional integral derivative controller noise and frequency divider noise are approximately -20dB/decade each. The 6.21GHz proposed proportional-integral-derivative controlled phase-locked loop is also highly stable with fast switching speed of 0.238nS at damping factor of 0.625 and phase margin of 92° for minimum phase noise.
比例-积分-导数控制锁相环的相位噪声分布研究
锁相环中的相位噪声来源于参考振荡器、鉴相器、环滤波器、压控振荡器和分频器,它们在输出频谱处产生高相位噪声,使系统不稳定。在这项工作中,建立了一个数学线性相位噪声模型来研究参考噪声、鉴相噪声、压控振荡器噪声、分频器噪声,特别是环路滤波器噪声的影响。为此,在采集过程中,将锁相环的传统有源或无源低通滤波器替换为比例-积分-导数控制器。通过对所提出的数学噪声模型进行线性分析,将每个分量的噪声问题表示为传递函数。仿真结果表明,压控振荡器的降噪效果为-40dB/ 10年,而基准噪声、鉴相噪声、比例积分导数控制器噪声和分频器噪声的降噪效果分别约为-20dB/ 10年。所提出的6.21GHz比例-积分-导数控制锁相环在阻尼系数为0.625时具有0.238nS的快速开关速度和92°的相位裕度,具有很高的稳定性和最小相位噪声。
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来源期刊
CiteScore
5.90
自引率
0.00%
发文量
22
期刊介绍: International Journal of Electrical and Electronic Engineering & Telecommunications. IJEETC is a scholarly peer-reviewed international scientific journal published quarterly, focusing on theories, systems, methods, algorithms and applications in electrical and electronic engineering & telecommunications. It provide a high profile, leading edge forum for academic researchers, industrial professionals, engineers, consultants, managers, educators and policy makers working in the field to contribute and disseminate innovative new work on Electrical and Electronic Engineering & Telecommunications. All papers will be blind reviewed and accepted papers will be published quarterly, which is available online (open access) and in printed version.
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