Jili Liu, Kang-ning Wang, Jialu Yin, Xue-long Zhao, Zhi Li, Huidong Zhao, Shushan Qiao
{"title":"A Dynamic Voltage Scaling Circuit Design Based on Critical Path Replica and Time Warning Techniques","authors":"Jili Liu, Kang-ning Wang, Jialu Yin, Xue-long Zhao, Zhi Li, Huidong Zhao, Shushan Qiao","doi":"10.1587/elex.20.20220520","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":0,"journal":{"name":"","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1587/elex.20.20220520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0