Efficient FPGA-Based Convolutional Neural Network Implementation for Edge Computing

Pub Date : 2023-01-01 DOI:10.12720/jait.14.3.479-487
C. Pham-Quoc, T. N. Thinh
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引用次数: 1

Abstract

—In recent years, accelerating convolutional neural networks on Field Programmable Gate Array (FPGA) to improve the performance of the inference phase of artificial intelligent edge computing applications is a promising approach. This paper presents our proposed architecture for building a convolution neural network acceleration core on FPGA. The proposed FPGA-based core targets edge computing platforms where hardware resources and power efficiency are essential requirements. We use the MobileNet neural network model for image classification as a case study to evaluate our proposed system. We compare our work with a quad-core ARM Cortex processor at 1.2GHz and achieve speed-ups by up to 14.77 × convolution operators. Although our system is worse than a 6-core Intel Core i7 processor, it is more energy-efficiency than the Intel processor. Our proposed system is the best fit for edge computing.
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基于fpga的高效卷积神经网络边缘计算实现
近年来,在现场可编程门阵列(FPGA)上加速卷积神经网络来提高人工智能边缘计算应用推理阶段的性能是一种很有前途的方法。本文提出了在FPGA上构建卷积神经网络加速核的架构。提出的基于fpga的核心目标是硬件资源和功率效率是基本要求的边缘计算平台。我们使用MobileNet神经网络模型进行图像分类作为案例研究来评估我们提出的系统。我们将我们的工作与1.2GHz的四核ARM Cortex处理器进行了比较,并实现了高达14.77倍卷积算子的加速。虽然我们的系统不如6核英特尔酷睿i7处理器,但它比英特尔处理器更节能。我们提出的系统最适合边缘计算。
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