High-Density Embedded Deep Trench Capacitors in Silicon With Enhanced Breakdown Voltage

Abstract

This paper reports on the design, implementation, and characterization of high-density trench-refilled capacitors in complementary metal-oxide-semiconductor (CMOS) grade silicon (1-10 Omegacm). High aspect ratio trench-refilled capacitors offer a capacitance density improvement of three orders of magnitude compared to thin-film capacitors with the same die area and dielectric thickness. Also, dielectric materials such as low-pressure chemical vapor deposition (LPCVD) silicon oxide and silicon nitride are utilized to enhance the breakdown voltage of these devices. The high aspect ratio polysilicon and single crystal silicon process was utilized to implement these capacitors, giving a gap aspect ratio of . This ultrahigh vertical capacitance area achieves an ultralarge capacitance density without requiring thin-or high-k dielectric material. High-value capacitors of values ranging from 40 nF to 4 muF with capacitance density of 58 (nF/mm 2) were implemented in silicon as arrays of 170 mum-deep trenches. LPCVD silicon dioxide and silicon nitride were employed as dielectric materials to provide robust deposition inside the high aspect ratio trenches. Trench-refilled capacitors show quality factors (Q) of 230 and 8, respectively, at 45 nF and 4 muF capacitances. The breakdown voltage in trench-refilled capacitors with 35 nm-thick Si3N4 is recorded to be as high as 17-V, which is ~4x to 10x larger than that of BaTiO3 and PbZrxTi1 - xO3 (PZT) thin-film capacitors with the same dielectric thickness. Furthermore, the capacitances were measured over a temperature range of 25 to 155degC, showing less than 1.8% variation in 45 nF devices. This implies that trench-refilled capacitors are free from the very strong temperature sensitivity exhibited by most high-k materials.