Design and verification of DEFLATE acceleration as an architected instruction in z15

IF 1.3 4区计算机科学 Q1 Computer Science

IBM Journal of Research and Development Pub Date : 2020-07-10 DOI:10.1147/JRD.2020.3008106

M. Klein;A. Misra;B. Abali;P. Sethia;S. Weishaupt;B. Giamei;M. Farrell;T. J. Slegel

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引用次数: 0

Abstract

The IBM z15 processor chip contains a new hardware component to perform DEFLATE compliant compression and decompression. The Integrated Accelerator for zEnterprise Data Compression is based on a high-frequency DEFLATE pipeline and includes a hardware generator for dynamic Huffman tables. Accessible as an architected instruction, this engine has been designed for straight forward exploitation by software and is easily available to any application in the problem state. A brand-new hardware/firmware integration model has been developed to provide this complex functionality without imposing restrictions on data patterns or data sizes and without impacting system responsiveness. This article describes the concept, implementation, and verification of DEFLATE compliant compression acceleration in z15 across both hardware and firmware. It illustrates various challenges that result from incorporating complex data-dependent and data-intense functionality like DEFLATE as an architected instruction and discusses how solutions in hardware/firmware codesign have been applied to overcome these challenges.

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z15体系结构指令DEFLATE加速度的设计与验证

IBMz15处理器芯片包含一个新的硬件组件，用于执行DEFLATE兼容的压缩和解压缩。zEnterprise数据压缩集成加速器基于高频DEFLATE管道，包括用于动态霍夫曼表的硬件生成器。该引擎作为一种体系结构指令可访问，专为软件直接利用而设计，任何处于问题状态的应用程序都可以轻松使用。已经开发了一种全新的硬件/固件集成模型来提供这种复杂的功能，而不会对数据模式或数据大小施加限制，也不会影响系统响应能力。本文描述了z15中兼容DEFLATE的压缩加速的概念、实现和验证，包括硬件和固件。它说明了将DEFLATE等复杂的依赖数据和数据密集型功能作为体系结构指令所带来的各种挑战，并讨论了如何应用硬件/固件代码设计中的解决方案来克服这些挑战。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IBM Journal of Research and Development 工程技术-计算机：硬件

自引率

0.00%

发文量

审稿时长

6-12 weeks

期刊介绍： The IBM Journal of Research and Development is a peer-reviewed technical journal, published bimonthly, which features the work of authors in the science, technology and engineering of information systems. Papers are written for the worldwide scientific research and development community and knowledgeable professionals. Submitted papers are welcome from the IBM technical community and from non-IBM authors on topics relevant to the scientific and technical content of the Journal.