SoC Protocol Implementation Verification Using Instruction-Level Abstraction (ILA) Specifications

IF 2.8 4区 计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Huaixi Lu, Yue Xing, Aarti Gupta, S. Malik
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引用次数: 0

Abstract

In modern systems-on-chips (SoCs) several hardware protocols are used for communication and interaction among different modules. These protocols are complex and need to be implemented correctly for correct operation of the SoC. Therefore, protocol verification has received significant attention. However, this verification is often limited to checking high-level properties on a protocol specification or an implementation. Verifying these properties directly on an implementation faces scalability challenges due to its size and design complexity. Further, even after some high-level properties are verified, there is no guarantee that an implementation fully complies with a given specification, even if the same properties have also been checked on the specification. We address these challenges and gaps by adding a layer of component specifications, one for each component in the protocol implementation, and specifying and verifying the interactions at the interfaces between each pair of communicating components. We use the recently proposed formal model termed the Instruction-Level-Abstraction (ILA) as a component specification, which includes an interface specification for the interactions in composing different components. The use of ILA models as component specifications allows us to decompose the complete verification task into two sub-tasks – checking that the composition of ILAs is sequentially equivalent to a verified formal protocol specification, and checking that the protocol implementation is a refinement of the ILA composition. This check requires that each component implementation is a refinement of its ILA specification, and includes interface checks guaranteeing that components interact with each other as specified. We have applied the proposed ILA-based methodology for protocol verification to several third-party design case studies. These include an AXI on-chip communication protocol, an off-chip communication protocol, and a cache coherence protocol. For each system, we successfully detected bugs in the implementation, and show that the full formal verification can be completed in reasonable time and effort.
使用指令级抽象(ILA)规范的SoC协议实现验证
在现代片上系统(SoC)中,几种硬件协议用于不同模块之间的通信和交互。这些协议很复杂,需要正确实现才能使SoC正确运行。因此,协议验证受到了极大的关注。然而,这种验证通常仅限于检查协议规范或实现的高级属性。由于其规模和设计复杂性,直接在实现上验证这些属性面临可扩展性挑战。此外,即使在验证了一些高级属性之后,也不能保证实现完全符合给定的规范,即使在规范上也检查了相同的属性。我们通过添加一层组件规范来解决这些挑战和差距,协议实现中的每个组件都有一层规范,并指定和验证每对通信组件之间接口的交互。我们使用最近提出的称为指令级抽象(ILA)的形式化模型作为组件规范,其中包括用于组成不同组件的交互的接口规范。使用ILA模型作为组件规范使我们能够将完整的验证任务分解为两个子任务——检查ILA的组成是否依次等效于已验证的正式协议规范,以及检查协议实现是否是ILA组成的细化。此检查要求每个组件实现都是其ILA规范的细化,并包括接口检查,以确保组件按照指定的方式相互交互。我们已经将所提出的基于ILA的协议验证方法应用于几个第三方设计案例研究。其中包括AXI片上通信协议、片外通信协议和高速缓存一致性协议。对于每个系统,我们都成功地检测到了实现中的错误,并表明可以在合理的时间和精力内完成完整的正式验证。
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来源期刊
ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems 工程技术-计算机:软件工程
CiteScore
3.20
自引率
7.10%
发文量
105
审稿时长
3 months
期刊介绍: TODAES is a premier ACM journal in design and automation of electronic systems. It publishes innovative work documenting significant research and development advances on the specification, design, analysis, simulation, testing, and evaluation of electronic systems, emphasizing a computer science/engineering orientation. Both theoretical analysis and practical solutions are welcome.
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