All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications

IF 1.6 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Ana Correia, V. Tavares, P. Barquinha, J. Goes
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引用次数: 1

Abstract

In this paper, the most suited analog-to-digital (A/D) converters (ADCs) for Internet of Things (IoT) applications are compared in terms of complexity, dynamic performance, and energy efficiency. Among them, an innovative hybrid topology, a digital–delta (Δ) modulator (ΔM) ADC employing noise shaping (NS), is proposed. To implement the active building blocks, several standard-cell-based synthesizable comparators and amplifiers are examined and compared in terms of their key performance parameters. The simulation results of a fully synthesizable Digital-ΔM with NS using passive and standard-cell-based circuitry show a peak of 72.5 dB in the signal-to-noise and distortion ratio (SNDR) for a 113 kHz input signal and 1 MHz bandwidth (BW). The estimated FoMWalden is close to 16.2 fJ/conv.-step.
基于全标准单元的模数架构,非常适合物联网应用
在本文中,比较了最适合物联网(IoT)应用的模数(A/D)转换器(adc)的复杂性、动态性能和能效。其中,提出了一种创新的混合拓扑,即采用噪声整形(NS)的数字增量(Δ)调制器(ΔM) ADC。为了实现主动构建块,几个基于标准细胞的可合成比较器和放大器在其关键性能参数方面进行了检查和比较。采用无源和基于标准单元电路的NS完全可合成数字-ΔM的仿真结果表明,在113 kHz输入信号和1 MHz带宽(BW)下,信噪比和失真比(SNDR)峰值为72.5 dB。瓦尔登湖的估算值接近16.2 fJ/ rev .-step。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Journal of Low Power Electronics and Applications
Journal of Low Power Electronics and Applications Engineering-Electrical and Electronic Engineering
CiteScore
3.60
自引率
14.30%
发文量
57
审稿时长
11 weeks
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