Two-stage S-Band LNA Development Using Non-Simultaneous Conjugate Match Technique

IF 0.5 Q4 COMPUTER SCIENCE, INFORMATION SYSTEMS
A. Munir, Y. Taryana, M. Yunus, H. Nusantara, M. R. Effendi
{"title":"Two-stage S-Band LNA Development Using Non-Simultaneous Conjugate Match Technique","authors":"A. Munir, Y. Taryana, M. Yunus, H. Nusantara, M. R. Effendi","doi":"10.5614/itbj.ict.res.appl.2019.13.3.3","DOIUrl":null,"url":null,"abstract":"This paper presents the development of a two-stage low noise amplifier (LNA) operating at the S-band frequency that is implemented using the non-simultaneous conjugate match (NSCM) technique. The motivation of this work was to solve the issue of the gain of LNAs designed using the most commonly used technique, i.e. simultaneous conjugate match (SCM), which often produce an increase of other parameter values, i.e. noise figure and voltage standing wave ratio (VSWR). Prior to hardware implementation, the circuit simulation software Advanced Design System (ADS) was applied to design the two-stage S-band LNA and to determine the desired trade-off between its parameters. The proposed two-stage S-band LNA was deployed on an Arlon DiClad527 using a bipolar junction transistor (BJT), type BFP420. Meanwhile, to achieve impedances that match the two-stage S-band LNA circuit, microstrip lines were employed at the input port, the interstage, and the output port. Experimental characterization showed that the realized two-stage S-band LNA produced a gain of 22.77 dB and a noise figure of 3.58 dB at a frequency of 3 GHz. These results were 6.1 dB lower than the simulated gain and 0.76 dB higher than the simulated noise figure respectively.","PeriodicalId":42785,"journal":{"name":"Journal of ICT Research and Applications","volume":"13 1","pages":"213-227"},"PeriodicalIF":0.5000,"publicationDate":"2019-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of ICT Research and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5614/itbj.ict.res.appl.2019.13.3.3","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, INFORMATION SYSTEMS","Score":null,"Total":0}
引用次数: 3

Abstract

This paper presents the development of a two-stage low noise amplifier (LNA) operating at the S-band frequency that is implemented using the non-simultaneous conjugate match (NSCM) technique. The motivation of this work was to solve the issue of the gain of LNAs designed using the most commonly used technique, i.e. simultaneous conjugate match (SCM), which often produce an increase of other parameter values, i.e. noise figure and voltage standing wave ratio (VSWR). Prior to hardware implementation, the circuit simulation software Advanced Design System (ADS) was applied to design the two-stage S-band LNA and to determine the desired trade-off between its parameters. The proposed two-stage S-band LNA was deployed on an Arlon DiClad527 using a bipolar junction transistor (BJT), type BFP420. Meanwhile, to achieve impedances that match the two-stage S-band LNA circuit, microstrip lines were employed at the input port, the interstage, and the output port. Experimental characterization showed that the realized two-stage S-band LNA produced a gain of 22.77 dB and a noise figure of 3.58 dB at a frequency of 3 GHz. These results were 6.1 dB lower than the simulated gain and 0.76 dB higher than the simulated noise figure respectively.
基于非同步共轭匹配技术的两级s波段LNA发展
本文介绍了一种工作在s波段的两级低噪声放大器(LNA),该放大器采用非同时共轭匹配(NSCM)技术实现。这项工作的动机是为了解决使用最常用的技术(即同时共轭匹配(SCM))设计的LNAs的增益问题,该技术通常会产生其他参数值的增加,即噪声系数和电压驻波比(VSWR)。在硬件实现之前,应用电路仿真软件Advanced Design System (ADS)来设计两级s波段LNA,并确定其参数之间的期望权衡。所提出的两级s波段LNA采用BFP420型双极结晶体管(BJT)部署在Arlon DiClad527上。同时,为了实现与两级s波段LNA电路相匹配的阻抗,在输入端口、级间端口和输出端口采用微带线。实验表征表明,所实现的两级s波段LNA在3ghz频率下的增益为22.77 dB,噪声系数为3.58 dB。结果比模拟增益低6.1 dB,比模拟噪声系数高0.76 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
Journal of ICT Research and Applications
Journal of ICT Research and Applications COMPUTER SCIENCE, INFORMATION SYSTEMS-
CiteScore
1.60
自引率
0.00%
发文量
13
审稿时长
24 weeks
期刊介绍: Journal of ICT Research and Applications welcomes full research articles in the area of Information and Communication Technology from the following subject areas: Information Theory, Signal Processing, Electronics, Computer Network, Telecommunication, Wireless & Mobile Computing, Internet Technology, Multimedia, Software Engineering, Computer Science, Information System and Knowledge Management. Authors are invited to submit articles that have not been published previously and are not under consideration elsewhere.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信