In the context of the integration of smart grids and new energy generation, the widespread use of power electronic interface devices will introduce additional DC bias to the system. Therefore, the DC bias suppression ability of the grid voltage information acquisition algorithm has become crucial. The second-order generalized integrator phase-locked loop (SOGI-PLL) is widely used in the synchronization and extraction of power grid information, which can effectively suppress the impact of frequency fluctuations and phase jumps on the accuracy of power grid state estimation. However, its adaptive frequency feedback loop is very sensitive to DC bias contained in the power grid while achieving harmonic suppression. A cascaded SOGI-PLL (FFCD-SOGI-PLL) with fixed frequency feedback is proposed to address this issue. The cascaded structure is used to input the nominal frequency of the fixed power grid, achieving signal DC component filtering and enhancing harmonic suppression performance. Provide stability analysis and parameter design methods through small signal models. The experimental results show that when the power grid voltage contains DC components, harmonics, and voltage drops, the designed FFCD-SOGI-PLL can quickly and stably accurately estimate the voltage state information of the power grid.