Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets

IF 3.3 3区 计算机科学 Q2 COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE
M. Kopczynski, T. Grzes
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引用次数: 5

Abstract

Abstract This paper presents FPGA and softcore CPU based solution for large datasets parallel core calculation using rough set methods. Architectures shown in this paper have been tested on two real datasets running presented solutions inside FPGA unit. Tested datasets had 1 000 to 10 000 000 objects. The same operations were performed in software implementation. Obtained results show the big acceleration in computation time using hardware supporting core generation in comparison to pure software implementation.
基于FPGA的硬件粗糙集处理器并行结构在大数据集中寻核
摘要本文提出了基于FPGA和软核CPU的大数据集并行核计算粗糙集方法的解决方案。本文给出的架构已经在两个实际数据集上进行了测试,并在FPGA单元内运行了所提出的解决方案。测试的数据集有1,000到10,000,000个对象。在软件实现中进行了相同的操作。所得结果表明,与纯软件实现相比,使用硬件支持内核生成的计算时间有很大的加快。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Journal of Artificial Intelligence and Soft Computing Research
Journal of Artificial Intelligence and Soft Computing Research COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE-
CiteScore
7.00
自引率
25.00%
发文量
10
审稿时长
24 weeks
期刊介绍: Journal of Artificial Intelligence and Soft Computing Research (available also at Sciendo (De Gruyter)) is a dynamically developing international journal focused on the latest scientific results and methods constituting traditional artificial intelligence methods and soft computing techniques. Our goal is to bring together scientists representing both approaches and various research communities.
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