Shaped beam pattern synthesis with desired nulling level and minimum sidelobe level

Q1 Engineering
Li-Ming Xu , Qiang-Jian Song , Shi-Wen Lei , Bo Chen , Jing Tian , Hao-Quan Hu
{"title":"Shaped beam pattern synthesis with desired nulling level and minimum sidelobe level","authors":"Li-Ming Xu ,&nbsp;Qiang-Jian Song ,&nbsp;Shi-Wen Lei ,&nbsp;Bo Chen ,&nbsp;Jing Tian ,&nbsp;Hao-Quan Hu","doi":"10.1016/j.jnlest.2023.100184","DOIUrl":null,"url":null,"abstract":"<div><p>For the anti-interference/denoise purpose, it usually requires minimizing the sidelobe level (SLL) of a wide-beam pattern with a desired low nulling level (NL) in the nulling region. To realize such an objective, the shaped-beam pattern synthesis (SBPS) is the most commonly used approach. However, since the SBPS problem focuses on synthesizing a predetermined beam shape, the minimum SLL via this approach cannot ensure to obtain the maximum power gain. Conversely, it cannot obtain the lowest SLL with a certain power gain requirement. Based on such consideration, this paper tries to further minimize SLL of a wide-beam pattern with a desired low NL nulling region, by solving the power gain pattern synthesis (PGPS) problem. The PGPS problem selects the array excitation by directly optimizing the power gain. Hence, it has the potential to reduce SLL, when achieving the equal mainlobe power gain constraint via SBPS. An iterative algorithm which converts the primal optimization problem into convex sub-problems is proposed, resulting in an effective problem-solving scheme. Numerical simulations demonstrate the proposed algorithm can obtain about 10-dB lower SLL than the existing algorithms.</p></div>","PeriodicalId":53467,"journal":{"name":"Journal of Electronic Science and Technology","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electronic Science and Technology","FirstCategoryId":"95","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1674862X23000022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

Abstract

For the anti-interference/denoise purpose, it usually requires minimizing the sidelobe level (SLL) of a wide-beam pattern with a desired low nulling level (NL) in the nulling region. To realize such an objective, the shaped-beam pattern synthesis (SBPS) is the most commonly used approach. However, since the SBPS problem focuses on synthesizing a predetermined beam shape, the minimum SLL via this approach cannot ensure to obtain the maximum power gain. Conversely, it cannot obtain the lowest SLL with a certain power gain requirement. Based on such consideration, this paper tries to further minimize SLL of a wide-beam pattern with a desired low NL nulling region, by solving the power gain pattern synthesis (PGPS) problem. The PGPS problem selects the array excitation by directly optimizing the power gain. Hence, it has the potential to reduce SLL, when achieving the equal mainlobe power gain constraint via SBPS. An iterative algorithm which converts the primal optimization problem into convex sub-problems is proposed, resulting in an effective problem-solving scheme. Numerical simulations demonstrate the proposed algorithm can obtain about 10-dB lower SLL than the existing algorithms.

具有期望的零电平和最小旁瓣电平的形束图合成
为了抗干扰/降噪的目的,通常需要最小化宽波束方向图的旁瓣电平(SLL),并使其在零区具有理想的低零电平(NL)。为了实现这一目标,最常用的方法是形束图合成(SBPS)。然而,由于SBPS问题的重点是合成预定的波束形状,因此通过该方法获得的最小SLL不能保证获得最大的功率增益。反之,在一定的功率增益要求下,无法获得最低的SLL。基于这种考虑,本文试图通过解决功率增益方向图合成(PGPS)问题,进一步最小化具有理想低NL零区的宽波束方向图的SLL。PGPS问题通过直接优化功率增益来选择阵列激励。因此,当通过SBPS实现相等的主瓣功率增益约束时,它有可能降低SLL。提出了一种将原优化问题转化为凸子问题的迭代算法,得到了一种有效的求解方案。数值仿真结果表明,该算法比现有算法可获得低10 db左右的信噪比。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Journal of Electronic Science and Technology
Journal of Electronic Science and Technology Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
0.00%
发文量
1362
审稿时长
99 days
期刊介绍: JEST (International) covers the state-of-the-art achievements in electronic science and technology, including the most highlight areas: ¨ Communication Technology ¨ Computer Science and Information Technology ¨ Information and Network Security ¨ Bioelectronics and Biomedicine ¨ Neural Networks and Intelligent Systems ¨ Electronic Systems and Array Processing ¨ Optoelectronic and Photonic Technologies ¨ Electronic Materials and Devices ¨ Sensing and Measurement ¨ Signal Processing and Image Processing JEST (International) is dedicated to building an open, high-level academic journal supported by researchers, professionals, and academicians. The Journal has been fully indexed by Ei INSPEC and has published, with great honor, the contributions from more than 20 countries and regions in the world.
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