Suppressing Quantum Circuit Errors Due to System Variability

IF 9.3 Q1 PHYSICS, APPLIED
P. Nation, Matthew Treinish
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引用次数: 18

Abstract

We present a quantum circuit optimization technique that takes into account the variability in error rates that is inherent across present day noisy quantum computing platforms. This method can be run post qubit routing or post-compilation, and consists of computing isomorphic subgraphs to input circuits and scoring each using heuristic cost functions derived from system calibration data. Using an independent standard algorithmic test suite we show that it is possible to recover on average nearly 40% of missing fidelity using better qubit selection via efficient to compute cost functions. We demonstrate additional performance gains by considering qubit placement over multiple quantum processors. The overhead from these tools is minimal with respect to other compilation steps, such as qubit routing, as the number of qubits increases. As such, our method can be used to find qubit mappings for problems at the scale of quantum advantage and beyond.
抑制系统可变性引起的量子电路误差
我们提出了一种量子电路优化技术,该技术考虑了当今嘈杂量子计算平台固有的错误率的可变性。该方法可以在量子位路由或编译后运行,包括计算输入电路的同构子图,并使用从系统校准数据导出的启发式成本函数对每个子图进行评分。使用独立的标准算法测试套件,我们表明,通过高效计算成本函数,使用更好的量子位选择,可以平均恢复近40%的丢失保真度。我们通过考虑在多个量子处理器上放置量子位来展示额外的性能增益。随着量子位数量的增加,与其他编译步骤(如量子位路由)相比,这些工具的开销是最小的。因此,我们的方法可以用于在量子优势及更大范围内寻找问题的量子位映射。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
14.60
自引率
0.00%
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