A simultaneous multithreading processor architecture with predictable timing behavior

IF 0.9 4区计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Design Automation for Embedded Systems Pub Date : 2018-11-01 DOI:10.1109/SBESC.2018.00018

Hadley M. Siqueira, M. Kreutz

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引用次数: 1

Abstract

Real-time embedded systems need software and hardware to be time-predictable to guarantee the correct behavior of the system. Precision Timed Machines are architectures designed for timing predictability and repeatability. They help to improve design time and the efficiency of real-time embedded systems by allowing to separately verify the timing properties of modules. This paper presents a Simultaneous Multithreading Precision Timed Machine named Hivek-RT that can execute hard real-time and conventional threads in parallel. It employs a repeatable thread-interleaved pipeline with an exposed memory hierarchy composed of scratchpads, caches, and a predictable SDRAM memory controller. The proposed architecture is well suited for real-time embedded systems as experimentation results show that the proposed architecture has improved throughput, presents low memory footprint and achieve a memory bandwidth of 90% of the theoretical value while providing deterministic time access to the memory hierarchy. This paper is an extended version of the paper presented on the 8th Brazilian Symposium on Computing Systems Engineering.

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具有可预测时序行为的同时多线程处理器体系结构

实时嵌入式系统需要软件和硬件具有时间可预测性，以保证系统的正确行为。精密定时机器是为定时可预测性和可重复性而设计的架构。通过允许单独验证模块的时序特性，它们有助于提高实时嵌入式系统的设计时间和效率。本文提出了一种名为Hivek RT的同时多线程精密定时机，它可以并行执行硬实时和传统线程。它采用了一个可重复的线程交错流水线，具有由暂存区、缓存和可预测SDRAM内存控制器组成的公开内存层次结构。所提出的体系结构非常适合实时嵌入式系统，因为实验结果表明，所提出的架构提高了吞吐量，呈现出低内存占用率，并实现了理论值的90%的内存带宽，同时提供了对内存层次结构的确定性时间访问。本文是在第八届巴西计算系统工程研讨会上发表的论文的扩展版本。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Design Automation for Embedded Systems 工程技术-计算机：软件工程

CiteScore

2.60

自引率

0.00%

发文量

审稿时长

>12 weeks

期刊介绍： Embedded (electronic) systems have become the electronic engines of modern consumer and industrial devices, from automobiles to satellites, from washing machines to high-definition TVs, and from cellular phones to complete base stations. These embedded systems encompass a variety of hardware and software components which implement a wide range of functions including digital, analog and RF parts. Although embedded systems have been designed for decades, the systematic design of such systems with well defined methodologies, automation tools and technologies has gained attention primarily in the last decade. Advances in silicon technology and increasingly demanding applications have significantly expanded the scope and complexity of embedded systems. These systems are only now becoming possible due to advances in methodologies, tools, architectures and design techniques. Design Automation for Embedded Systems is a multidisciplinary journal which addresses the systematic design of embedded systems, focusing primarily on tools, methodologies and architectures for embedded systems, including HW/SW co-design, simulation and modeling approaches, synthesis techniques, architectures and design exploration, among others. Design Automation for Embedded Systems offers a forum for scientist and engineers to report on their latest works on algorithms, tools, architectures, case studies and real design examples related to embedded systems hardware and software. Design Automation for Embedded Systems is an innovative journal which distinguishes itself by welcoming high-quality papers on the methodology, tools, architectures and design of electronic embedded systems, leading to a true multidisciplinary system design journal.