A CMOS Front-End Interface ASIC for SiPM-based Positron Emission Tomography Imaging Systems.

Samrat Dey, Jacques C Rudell, Thomas K Lewellen, Robert S Miyaoka
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引用次数: 5

Abstract

A current-mode interface chip for Silicon Photomultiplier (SiPM) array based positron emission tomography (PET) imaging front-ends is described. The circuit uses a high-speed current amplifier with a low input impedance, to minimize signal loss at the SiPM amplifier interface. To reduce the impact of dark noise, a novel high-speed threshold detection/comparator circuit is used to remove unwanted noise events. A prototype chip interfaces an array of SiPMs to the digital backend of a Positron Emission Tomography (PET) system using 64 readout channels, each of which contain a current amplifier and a threshold detection component. To reduce the number of backend channels, a row-column pulse positioning architecture (RCA) has been implemented. The ASIC occupies an area of 14.04 mm2 in 130nm STMicroelectronics HCMOS9GP process. The measured input impedance of the current amplifier is 20 ohms at 10 MHz, while the threshold detection circuit's propagation delay is 0.3-2ns.

Abstract Image

Abstract Image

Abstract Image

基于sipm的正电子发射层析成像系统的CMOS前端接口ASIC。
介绍了一种用于硅光电倍增管(SiPM)阵列正电子发射层析成像(PET)前端的电流模式接口芯片。该电路采用低输入阻抗的高速电流放大器,最大限度地减少SiPM放大器接口的信号损耗。为了减少暗噪声的影响,采用了一种新型的高速阈值检测/比较器电路来去除不需要的噪声事件。一个原型芯片使用64个读出通道将一组SiPMs连接到正电子发射断层扫描(PET)系统的数字后端,每个通道包含一个电流放大器和一个阈值检测组件。为了减少后端信道的数量,实现了一种行列脉冲定位体系结构(RCA)。ASIC占地14.04 mm2,采用130nm意法半导体HCMOS9GP工艺。电流放大器在10 MHz时的测量输入阻抗为20欧姆,阈值检测电路的传播延迟为0.3-2ns。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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