3-D PLL Model Considering Frequency-Impedance Coupling for Accurate Whole-Process Dynamic Capture and Transient Stability Analysis

Abstract

Transient synchronization stability of the grid-connected converter is critically affected by the phase-locked loop (PLL) dynamics. However, frequency-impedance coupling (FIC) induced by PLL frequency deviation is often neglected in the conventional quasi-steady-state (QSS) PLL model, which may lead to an inaccurate post-fault stability assessment. To address this issue, this article proposes a 3-D frequency-impedance coupling (FIC) PLL model that explicitly incorporates frequency drift during faults, enabling whole-process transient stability analysis from fault occurrence to recovery. Based on that, the existence conditions of stable equilibrium points and the evolution of the domain of attraction (DOA) are investigated comprehensively with respect to grid strengths, PLL parameters, and fault durations. Furthermore, a DOA-oriented parameter design framework is developed to enhance transient stability. Finally, experimental results on a scaled-down GCC platform validate that the FIC-PLL model provides more accurate stability assessments than conventional QSS models, and the optimized PLL parameters effectively improve transient stability under weak-grid conditions.