Design and implementation of a Zynq SoC-based digital RF interlock system for the 100 MeV linear accelerator at KAERI

Abstract

The high-power RF system at the Korea Multipurpose Accelerator Complex (KOMAC) operates at 350 MHz with a peak power of 1.6 MW, a pulse width of 1.5 ms. The maximum beam repetition rate is 120 Hz at 20 MeV and 60 Hz at 100 MeV linac sections, respectively. Stable accelerator operation requires strict RF amplitude and phase stability within 1% and 1°, as well as cavity resonance detuning control within 10% of the RF bandwidth. To satisfy these demanding operational conditions, a digital high-power RF interlock system has been developed. The system supports remote and automatic threshold reconfiguration and is fully integrated into the EPICS control environment for centralized monitoring and operation. A Zynq SoC-based architecture digitizes forward, reverse, and pickup signals using ADCs, converts them into calibrated power values and enables waveform and power monitoring during normal operation. In addition, a built-in postmortem function records pre and postinterlock data, allowing operators to identify fault mechanisms and root causes with high temporal resolution. This paper presents the design and implementation of an RF protection system optimized for the 100 MeV proton linac at KOMAC, which consists of nine klystrons, nine circulators, and thirteen RF windows. Compared with the conventional analog interlock system, the proposed digital platform significantly enhances RF stability, fault diagnostics, and operational flexibility.