Dynamic Current-Sharing Model for Multichip Parallel MOSFETs with Common-Source Structure

Abstract

With the gradual popularization of integrated modules of parallel chips, current sharing has become a key research direction in meeting increasingly stringent performance requirements. Most existing current-sharing methods focus on the half-bridge structure of parallel chips, which is not applicable to common-source power modules with bidirectional turn-on and turn-off capability. A current-sharing method is proposed for multi-chip parallel metal-oxide-semiconductor field-effect transistors (MOSFETs) in a common-source structure and a current-sharing criterion is introduced for MOSFETs in a common-source connection, which improves current balancing in package modeling by suppressing the circulating current between chips in an asymmetric layout. This study models the MOSFET common-source power module, abstracts the package parasitic parameter variation scenarios in different layouts, and extracts the parasitic inductance for the simulation. The simulation results verified the validity of the proposed current-sharing criterion. A MOSFET power module is fabricated and double-pulse-tested to verify its on-off capability. This study provides a basis for improving the current-sharing capability of parallel devices, and offers new insights into the design and optimization of power module packages.