Based on Tensor Core Sparse Kernels Accelerating Deep Neural Networks

IF 5.9 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS
Shijie Lv;Debin Liu;Laurence T. Yang;Xiaosong Peng;Ruonan Zhao;Zecan Yang;Jun Feng
{"title":"Based on Tensor Core Sparse Kernels Accelerating Deep Neural Networks","authors":"Shijie Lv;Debin Liu;Laurence T. Yang;Xiaosong Peng;Ruonan Zhao;Zecan Yang;Jun Feng","doi":"10.1109/TPDS.2025.3637268","DOIUrl":null,"url":null,"abstract":"Large language models in deep learning have numerous parameters, requiring significant storage space and computational resources. Compression techniques are highly effective in addressing these challenges. With the development of hardware like Graphics Processing Unit (GPU), Tensor Core can accelerate low-precision matrix multiplication but achieve acceleration for sparse matrices is challenging. Due to its sparsity, the utilization of Tensor Cores is relatively low. To address this, we propose the based on <b>T</b>ensor <b>C</b>ore <b>C</b>ompressed <b>S</b>parse <b>R</b>ow format (TC-CSR), which facilitates data loading on GPUs and matrix operations on Tensor Cores. Based on this format, we designed block Sparse Matrix-Matrix Multiplication (SpMM) and Sampled Dense-Dense Matrix Multiplication (SDDMM) kernels, which are common operations in deep learning. Utilizing these designs, we achieved a <inline-formula><tex-math>$\\mathbf {1.41\\times }$</tex-math></inline-formula> speedup on Sputnik in scenarios of moderate sparsity and a <inline-formula><tex-math>$\\mathbf {1.38\\times }$</tex-math></inline-formula> speedup with large-scale highly sparse matrices. Benefit from our design, we achieved a <inline-formula><tex-math>$\\mathbf {1.75\\times }$</tex-math></inline-formula> speedup in end-to-end inference with sparse Transformers and save memory.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":"37 2","pages":"353-364"},"PeriodicalIF":5.9000,"publicationDate":"2025-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Parallel and Distributed Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/11269666/","RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"COMPUTER SCIENCE, THEORY & METHODS","Score":null,"Total":0}
引用次数: 0

Abstract

Large language models in deep learning have numerous parameters, requiring significant storage space and computational resources. Compression techniques are highly effective in addressing these challenges. With the development of hardware like Graphics Processing Unit (GPU), Tensor Core can accelerate low-precision matrix multiplication but achieve acceleration for sparse matrices is challenging. Due to its sparsity, the utilization of Tensor Cores is relatively low. To address this, we propose the based on Tensor Core Compressed Sparse Row format (TC-CSR), which facilitates data loading on GPUs and matrix operations on Tensor Cores. Based on this format, we designed block Sparse Matrix-Matrix Multiplication (SpMM) and Sampled Dense-Dense Matrix Multiplication (SDDMM) kernels, which are common operations in deep learning. Utilizing these designs, we achieved a $\mathbf {1.41\times }$ speedup on Sputnik in scenarios of moderate sparsity and a $\mathbf {1.38\times }$ speedup with large-scale highly sparse matrices. Benefit from our design, we achieved a $\mathbf {1.75\times }$ speedup in end-to-end inference with sparse Transformers and save memory.
基于张量核稀疏核的深度神经网络加速
深度学习中的大型语言模型有许多参数,需要大量的存储空间和计算资源。压缩技术在解决这些挑战方面非常有效。随着图形处理器(GPU)等硬件的发展,Tensor Core可以加速低精度的矩阵乘法,但实现稀疏矩阵的加速是一个挑战。由于其稀疏性,张量核的利用率相对较低。为了解决这个问题,我们提出了基于张量核心压缩稀疏行格式(TC-CSR),该格式便于在gpu上加载数据和在张量核心上进行矩阵运算。基于这种格式,我们设计了深度学习中常用的块稀疏矩阵-矩阵乘法(SpMM)和采样稠密矩阵乘法(SDDMM)核。利用这些设计,我们在Sputnik上实现了中等稀疏度场景下的$\mathbf {1.41\times}$加速,在大规模高度稀疏矩阵下实现了$\mathbf {1.38\times}$加速。得益于我们的设计,我们在使用稀疏变压器的端到端推理中实现了$\mathbf {1.75\times}$的加速,并节省了内存。
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来源期刊
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems 工程技术-工程:电子与电气
CiteScore
11.00
自引率
9.40%
发文量
281
审稿时长
5.6 months
期刊介绍: IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to: a) Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing. b) Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems. c) Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation. d) Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.
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