Improving the accuracy of digital-to-analogue converters

Abstract

The precision of digital-to-analogue converters (DACs) is principally limited by static errors in the output voltage or current levels, known as element mismatch. This paper evaluates five error mitigation methods on a set of candidate integrated circuit (IC) designs. The aim is to find a combination of a realistic and implementable IC design and a linearisation method that can yield a minimum of 18 effective number of bits (ENOB) at a 100 kHz bandwidth, well above the current state-of-the-art of semiconductor-based DACs, which currently is 17 ENOB at a 10 kHz bandwidth. It is demonstrated that three out of five methods provide performance improvements, with noise-shaping with digital calibration approaching the desired target.