Digital to analog converter based on pulse-width adding

Q4 Engineering
Vítor Viegas , J.M. Dias Pereira
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引用次数: 0

Abstract

This paper presents a digital-to-analog converter (DAC) based on the pulse width created naturally by the binary counting sequence. The concept involves combining the counting impulses of the bits to form a pulse-width modulated signal, where the mean voltage is proportional to the input digital code. We propose a circuit capable of achieving this using general-purpose components. Although our design targets 8 bits, it is scalable for any number of nibbles.
The paper details simulations conducted to verify the proper functioning of the circuit and to evaluate its performance. Tests were performed to determine the static characteristics of the converter, measure its differential nonlinearity (DNL), and observe its step response.
In static terms, the converter exhibited negligible gain and offset errors, with a DNL below 1 LSB (least significant bit). The converter operated correctly without any missing codes.
In dynamic terms, the converter demonstrated a bandwidth of 10 kHz and behaved like a second-order low-pass filter with critical damping.
基于脉宽加和的数模转换器
本文提出了一种基于二进制计数序列自然产生的脉冲宽度的数模转换器(DAC)。这个概念包括将比特的计数脉冲组合起来,形成一个脉宽调制信号,其中平均电压与输入数字代码成正比。我们提出了一种使用通用元件实现这一目标的电路。虽然我们的设计目标是8位,但它可以扩展到任何数量的小块。本文详细地进行了仿真,以验证电路的正常工作并评估其性能。进行了测试,以确定转换器的静态特性,测量其微分非线性(DNL),并观察其阶跃响应。在静态方面,转换器的增益和偏移误差可以忽略不计,DNL低于1 LSB(最低有效位)。转换器工作正常,没有丢失任何代码。在动态方面,转换器的带宽为10 kHz,表现得像一个具有临界阻尼的二阶低通滤波器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Measurement Sensors
Measurement Sensors Engineering-Industrial and Manufacturing Engineering
CiteScore
3.10
自引率
0.00%
发文量
184
审稿时长
56 days
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