Md. Hasan Maruf, Arif Hossain, Abdullah Al Mahfuz, Md. Mohi Uddin Mohin, Md. Sabbir Alam, Md. Shakib Ibne Ashrafi, M M Naushad Ali, Md Ashraful Islam
{"title":"Optimized Cascode LNA design for low noise and high gain at 5 GHz","authors":"Md. Hasan Maruf, Arif Hossain, Abdullah Al Mahfuz, Md. Mohi Uddin Mohin, Md. Sabbir Alam, Md. Shakib Ibne Ashrafi, M M Naushad Ali, Md Ashraful Islam","doi":"10.1016/j.prime.2025.101030","DOIUrl":null,"url":null,"abstract":"<div><div>The receiver plays a critical role in wireless communication systems, especially for low-power signals known for their durability and speed. As a receiver's front-end component, a Low Noise Amplifier (LNA) amplifies signals to increase power levels while maintaining the Signal-to-Noise Ratio (SNR). With the increasing demand for high-performance and energy-efficient wireless networks, the design of LNA architectures has become paramount. However, during amplification, the signal encounters challenges such as the ‘Miller effect,’ which reduces frequency and bandwidth, and residual noise at the output. In this work, LNA designs for CMOS-based wireless communication systems are thoroughly analyzed, emphasizing resolving the issues of attaining low noise figure and high power gain. A Cascode LNA circuit is suggested, which provides better performance in terms of noise figure and power gain than previous designs. The proposed LNA, implemented and analyzed using 130 nm CMOS technology in Advanced Design System (ADS) software, operates at a 5 GHz frequency with a 1 V supply voltage. The design achieves an input reflection coefficient (s11) of less than -10 dB, a power gain of 15.088 dB, and a noise figure of 0.541 dB, demonstrating its effectiveness for high-performance wireless communication applications.</div></div>","PeriodicalId":100488,"journal":{"name":"e-Prime - Advances in Electrical Engineering, Electronics and Energy","volume":"12 ","pages":"Article 101030"},"PeriodicalIF":0.0000,"publicationDate":"2025-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"e-Prime - Advances in Electrical Engineering, Electronics and Energy","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2772671125001378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The receiver plays a critical role in wireless communication systems, especially for low-power signals known for their durability and speed. As a receiver's front-end component, a Low Noise Amplifier (LNA) amplifies signals to increase power levels while maintaining the Signal-to-Noise Ratio (SNR). With the increasing demand for high-performance and energy-efficient wireless networks, the design of LNA architectures has become paramount. However, during amplification, the signal encounters challenges such as the ‘Miller effect,’ which reduces frequency and bandwidth, and residual noise at the output. In this work, LNA designs for CMOS-based wireless communication systems are thoroughly analyzed, emphasizing resolving the issues of attaining low noise figure and high power gain. A Cascode LNA circuit is suggested, which provides better performance in terms of noise figure and power gain than previous designs. The proposed LNA, implemented and analyzed using 130 nm CMOS technology in Advanced Design System (ADS) software, operates at a 5 GHz frequency with a 1 V supply voltage. The design achieves an input reflection coefficient (s11) of less than -10 dB, a power gain of 15.088 dB, and a noise figure of 0.541 dB, demonstrating its effectiveness for high-performance wireless communication applications.