Efficient voltage-mode all-pass filter design with second-generation voltage conveyor

Khushbu Bansal, Jitendra Mohan, Bhartendu Chaturvedi
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引用次数: 0

Abstract

Due to the growing demand for low-voltage, low-power circuits in modern electronics and communication systems, efficient phase-shifting networks are crucial. This paper presents an efficient voltage-mode first-order all-pass filter that is implemented with a second-generation voltage conveyor as the active building block, along with three passive elements exhibiting acceptable sensitivity. The main contributions involve detailed analyses of non-ideal and parasitic behavior to make the design feasible in real-time applications. To enhance IC fabrication feasibility, metal-oxide-semiconductor (MOS) structures take over passive resistors with built-in tunability. The design is verified using Cadence PSPICE simulations using 0.18 µm CMOS process with ± 0.9 V supply voltages, showing close conformity with theoretical predictions. The proposed circuit is further validated using Monte Carlo simulations for the effect of capacitor variations and temperature-induced deviations. Additionally, the viability of the proposed circuit is experimentally verified using AD844 ICs. Though the design presents better performance and tunability, slight variations based on temperature changes may be observed.
高效电压模式全通滤波器设计与第二代电压输送机
由于现代电子和通信系统对低压、低功耗电路的需求日益增长,高效的移相网络至关重要。本文提出了一种高效的电压模式一阶全通滤波器,该滤波器采用第二代电压传送带作为有源模块,以及三个具有可接受灵敏度的无源元件。主要贡献包括对非理想和寄生行为的详细分析,以使设计在实时应用中可行。为了提高集成电路制造的可行性,金属氧化物半导体(MOS)结构取代了具有内置可调性的无源电阻。采用±0.9 V电源电压,采用0.18µm CMOS工艺,通过Cadence PSPICE仿真验证了该设计,结果与理论预测非常吻合。利用蒙特卡罗模拟进一步验证了电容变化和温度诱导偏差的影响。此外,采用AD844集成电路进行了可行性实验验证。虽然该设计具有较好的性能和可调性,但可能会观察到基于温度变化的轻微变化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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