{"title":"Efficient voltage-mode all-pass filter design with second-generation voltage conveyor","authors":"Khushbu Bansal, Jitendra Mohan, Bhartendu Chaturvedi","doi":"10.1016/j.prime.2025.100987","DOIUrl":null,"url":null,"abstract":"<div><div>Due to the growing demand for low-voltage, low-power circuits in modern electronics and communication systems, efficient phase-shifting networks are crucial. This paper presents an efficient voltage-mode first-order all-pass filter that is implemented with a second-generation voltage conveyor as the active building block, along with three passive elements exhibiting acceptable sensitivity. The main contributions involve detailed analyses of non-ideal and parasitic behavior to make the design feasible in real-time applications. To enhance IC fabrication feasibility, metal-oxide-semiconductor (MOS) structures take over passive resistors with built-in tunability. The design is verified using Cadence PSPICE simulations using 0.18 µm CMOS process with ± 0.9 V supply voltages, showing close conformity with theoretical predictions. The proposed circuit is further validated using Monte Carlo simulations for the effect of capacitor variations and temperature-induced deviations. Additionally, the viability of the proposed circuit is experimentally verified using AD844 ICs. Though the design presents better performance and tunability, slight variations based on temperature changes may be observed.</div></div>","PeriodicalId":100488,"journal":{"name":"e-Prime - Advances in Electrical Engineering, Electronics and Energy","volume":"12 ","pages":"Article 100987"},"PeriodicalIF":0.0000,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"e-Prime - Advances in Electrical Engineering, Electronics and Energy","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2772671125000944","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Due to the growing demand for low-voltage, low-power circuits in modern electronics and communication systems, efficient phase-shifting networks are crucial. This paper presents an efficient voltage-mode first-order all-pass filter that is implemented with a second-generation voltage conveyor as the active building block, along with three passive elements exhibiting acceptable sensitivity. The main contributions involve detailed analyses of non-ideal and parasitic behavior to make the design feasible in real-time applications. To enhance IC fabrication feasibility, metal-oxide-semiconductor (MOS) structures take over passive resistors with built-in tunability. The design is verified using Cadence PSPICE simulations using 0.18 µm CMOS process with ± 0.9 V supply voltages, showing close conformity with theoretical predictions. The proposed circuit is further validated using Monte Carlo simulations for the effect of capacitor variations and temperature-induced deviations. Additionally, the viability of the proposed circuit is experimentally verified using AD844 ICs. Though the design presents better performance and tunability, slight variations based on temperature changes may be observed.