Suyash Sachdeva , Ujjwal Sharma , Priyanshu Rajput , Riya Singhal , K. Madhu Kiran , Rohit Dhiman
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引用次数: 0
Abstract
Recent advancements in deep image steganography have shown promise, yet many existing approaches fail to address the inherently lossy nature of neural networks, limiting their effectiveness. To overcome this limitation, we propose a novel architecture that integrates residual dense multi-scale JBs and FEBs within a three-phased U-Net framework, composed of three interconnected sub-networks: the secret encoder, encoder, and decoder. This modular design enhances data encoding and facilitates easy adaptation to different datasets, offering greater flexibility. By incorporating multi-scale processing to minimize information loss and leveraging high inter-connectivity to improve feature hiding. Additionally, a custom loss function, combining seven distinct components, is employed to guide the model’s learning process. The effectiveness of this architecture is demonstrated on CIFAR-10, CIFAR-100, and CelebA datasets, where it achieves an average improvement of 4.76 in peak signal-to-noise ratio (PSNR) and 0.0292 in structural similarity index measure (SSIM), which highlight the potential proposed architecture to elevate the field of image steganography.
期刊介绍:
The impact of computers has nowhere been more revolutionary than in electrical engineering. The design, analysis, and operation of electrical and electronic systems are now dominated by computers, a transformation that has been motivated by the natural ease of interface between computers and electrical systems, and the promise of spectacular improvements in speed and efficiency.
Published since 1973, Computers & Electrical Engineering provides rapid publication of topical research into the integration of computer technology and computational techniques with electrical and electronic systems. The journal publishes papers featuring novel implementations of computers and computational techniques in areas like signal and image processing, high-performance computing, parallel processing, and communications. Special attention will be paid to papers describing innovative architectures, algorithms, and software tools.