FastLoad: Speeding Up Data Loading of Both Sparse Matrix and Vector for SpMV on GPUs

IF 5.6 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS
Jinyu Hu;Huizhang Luo;Hong Jiang;Guoqing Xiao;Kenli Li
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Abstract

Sparse Matrix-Vector Multiplication (SpMV) on GPUs has gained significant attention because of SpMV's importance in modern applications and the increasing computing power of GPUs in the last decade. Previous studies have emphasized the importance of data loading for the overall performance of SpMV and demonstrated the efficacy of coalesced memory access in enhancing data loading efficiency. However, existing approaches fall far short of reaching the full potential of data loading on modern GPUs. In this paper, we propose an efficient algorithm called FastLoad, that speeds up the loading of both sparse matrices and input vectors of SpMV on modern GPUs. Leveraging coalesced memory access, FastLoad achieves high loading efficiency and load balance by sorting both the columns of the sparse matrix and elements of the input vector based on the number of non-zero elements while organizing non-zero elements in blocks to avoid thread divergence. FastLoad takes the Compressed Sparse Column (CSC) format as an implementation case to prove the concept and gain insights. We conduct a comprehensive comparison of FastLoad with the CSC-based SpMV, cuSPARSE, CSR5, and TileSpMV, using the full SuiteSparse Matrix Collection as workload. The experimental results on RTX 3090 Ti demonstrate that our method outperforms the others in most matrices, with geometric speedup means over CSC-based, cuSPARSE, CSR5, and TileSpMV being 2.12×, 2.98×, 2.88×, and 1.22×, respectively.
FastLoad:加快 GPU 上 SpMV 稀疏矩阵和矢量的数据加载速度
由于稀疏矩阵-矢量乘法(SpMV)在现代应用中的重要性以及近十年来 GPU 计算能力的不断提升,它在 GPU 上的应用受到了广泛关注。以往的研究强调了数据加载对 SpMV 整体性能的重要性,并证明了凝聚内存访问在提高数据加载效率方面的功效。然而,现有的方法远不能充分发挥数据加载在现代 GPU 上的潜力。在本文中,我们提出了一种名为 "FastLoad "的高效算法,它能加快 SpMV 在现代 GPU 上的稀疏矩阵和输入向量的加载速度。利用凝聚内存访问,FastLoad 根据非零元素的数量对稀疏矩阵的列和输入向量的元素进行排序,同时将非零元素组织成块以避免线程发散,从而实现了高加载效率和负载平衡。FastLoad 以压缩稀疏列(CSC)格式为实施案例,证明了这一概念并获得了深刻的见解。我们使用完整的 SuiteSparse Matrix Collection 作为工作负载,对 FastLoad 与基于 CSC 的 SpMV、cuSPARSE、CSR5 和 TileSpMV 进行了全面比较。在 RTX 3090 Ti 上的实验结果表明,我们的方法在大多数矩阵中都优于其他方法,与基于 CSC 的 SpMV、cuSPARSE、CSR5 和 TileSpMV 相比,几何速度分别提高了 2.12×、2.98×、2.88× 和 1.22×。
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来源期刊
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems 工程技术-工程:电子与电气
CiteScore
11.00
自引率
9.40%
发文量
281
审稿时长
5.6 months
期刊介绍: IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to: a) Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing. b) Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems. c) Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation. d) Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.
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