A Compact Electronically Tunable Meminductor Emulator Model and Its Application

IF 5.6 2区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Circuits and Systems Magazine Pub Date : 2024-08-19 DOI:10.1109/mcas.2024.3353151

Pankaj Kumar Sharma, Rajeev Kumar Ranjan, Sung-Mo Kang

{"title":"A Compact Electronically Tunable Meminductor Emulator Model and Its Application","authors":"Pankaj Kumar Sharma, Rajeev Kumar Ranjan, Sung-Mo Kang","doi":"10.1109/mcas.2024.3353151","DOIUrl":null,"url":null,"abstract":"A compact MOSFET-C floating/grounded meminductor emulator (MIE) model is presented for high operating frequency and low power operation. The proposed MIE uses only 22 MOSFETs and two capacitors. Its performance is theoretically analyzed and rigorously verified using the Cadence Virtuoso software and hardware prototypes. The proposed MIE operates appropriately for a wide range of frequencies up to 5 MHz with <inline-formula xmlns:mml=\"http://www.w3.org/1998/Math/MathML\" xmlns:xlink=\"http://www.w3.org/1999/xlink\"> <tex-math notation=\"LaTeX\">$590 \\mu \\text{W}$ </tex-math></inline-formula> power consumption at a 180nm CMOS technology node and manifests important signature properties. The MIE layout area in 180 nm CMOS technology is <inline-formula xmlns:mml=\"http://www.w3.org/1998/Math/MathML\" xmlns:xlink=\"http://www.w3.org/1999/xlink\"> <tex-math notation=\"LaTeX\">$13107.5 \\mu \\text{m}^{2}$ </tex-math></inline-formula>\n. To analyze the effects of statistical variations in MIE elements, extensive Monte Carlo simulations have been performed to demonstrate the robustness of the proposed MIE. For experimental validation, hardware prototypes have been developed and tested successfully. An MIE-based adaptive learning neuromorphic circuit is presented to show that it can mimic the behavioral responses of amoeba under varying environments such as temperature.","PeriodicalId":55038,"journal":{"name":"IEEE Circuits and Systems Magazine","volume":"6 1","pages":""},"PeriodicalIF":5.6000,"publicationDate":"2024-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Circuits and Systems Magazine","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1109/mcas.2024.3353151","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

A compact MOSFET-C floating/grounded meminductor emulator (MIE) model is presented for high operating frequency and low power operation. The proposed MIE uses only 22 MOSFETs and two capacitors. Its performance is theoretically analyzed and rigorously verified using the Cadence Virtuoso software and hardware prototypes. The proposed MIE operates appropriately for a wide range of frequencies up to 5 MHz with

$590 \mu \text{W}$

power consumption at a 180nm CMOS technology node and manifests important signature properties. The MIE layout area in 180 nm CMOS technology is

$13107.5 \mu \text{m}^{2}$

. To analyze the effects of statistical variations in MIE elements, extensive Monte Carlo simulations have been performed to demonstrate the robustness of the proposed MIE. For experimental validation, hardware prototypes have been developed and tested successfully. An MIE-based adaptive learning neuromorphic circuit is presented to show that it can mimic the behavioral responses of amoeba under varying environments such as temperature.

查看原文本刊更多论文

紧凑型电子可调膜电管仿真器模型及其应用

本文提出了一种紧凑型 MOSFET-C 浮地/接地忆阻器仿真器（MIE）模型，可实现高工作频率和低功耗运行。拟议的 MIE 仅使用了 22 个 MOSFET 和两个电容器。利用 Cadence Virtuoso 软件和硬件原型对其性能进行了理论分析和严格验证。在180纳米CMOS技术节点上，所提出的MIE可在高达5 MHz的宽频率范围内以590 \mu \text{W}$的功耗正常工作，并表现出重要的特征特性。180 纳米 CMOS 技术的 MIE 布局面积为 13107.5 \mu \text{m}^{2}$。为了分析 MIE 元素统计变化的影响，我们进行了大量蒙特卡罗仿真，以证明拟议 MIE 的鲁棒性。为了进行实验验证，还开发并成功测试了硬件原型。本文介绍了一种基于 MIE 的自适应学习神经形态电路，证明它可以模仿变形虫在温度等不同环境下的行为反应。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

IEEE Circuits and Systems Magazine 工程技术-工程：电子与电气

CiteScore

9.30

自引率

1.40%

发文量

审稿时长

>12 weeks

期刊介绍： The IEEE Circuits and Systems Magazine covers the subject areas represented by the Society's transactions, including: analog, passive, switch capacitor, and digital filters; electronic circuits, networks, graph theory, and RF communication circuits; system theory; discrete, IC, and VLSI circuit design; multidimensional circuits and systems; large-scale systems and power networks; nonlinear circuits and systems, wavelets, filter banks, and applications; neural networks; and signal processing. Content also covers the areas represented by the Society technical committees: analog signal processing, cellular neural networks and array computing, circuits and systems for communications, computer-aided network design, digital signal processing, multimedia systems and applications, neural systems and applications, nonlinear circuits and systems, power systems and power electronics and circuits, sensors and micromaching, visual signal processing and communication, and VLSI systems and applications. Lastly, the magazine covers the interests represented by the widespread conference activity of the IEEE Circuits and Systems Society. In addition to the technical articles, the magazine also covers Society administrative activities, as for instance the meetings of the Board of Governors, Society People, as for instance the stories of award winners-fellows, medalists, and so forth, and Places reached by the Society, including readable reports from the Society's conferences around the world.