700 MHz–1.4 GHz and 30–70%, Frequency, and Duty-Cycle Locking Loop

IF 1.3 4区计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IETE Journal of Research Pub Date : 2024-09-04 DOI:10.1080/03772063.2024.2377763

H. Babazadeh, A. Esmaili

引用次数: 0

Abstract

Pulse width detection is an important issue, especially in PWM systems. Usually, in data receivers, PLLs are used to recover clock/data frequency or phase, and another circuit is used to reconstruc...

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700 MHz-1.4 GHz 和 30-70%、频率和占空比锁定环路

脉冲宽度检测是一个重要问题，尤其是在 PWM 系统中。通常，在数据接收器中，PLL 用于恢复时钟/数据频率或相位，而另一个电路用于重新构建时钟/数据频率或相位。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IETE Journal of Research 工程技术-电信学

CiteScore

3.30

自引率

6.70%

发文量

308

期刊介绍： IETE Journal of Research is a Bimonthly journal published by the Institution of Electronics and Telecommunication Engineers (IETE), India. It publishes scientific and technical papers describing original research work or novel product/process development. Occasionally special issues are brought out on new and emerging research areas. IETE Journal of Research is useful to researchers, engineers, scientists, teachers, managers and students who are interested in keeping a track of original research and development work being carried out in the broad area of electronics, telecommunications, computer science and engineering and information technology.