Comparative analysis of single and triple material 10 nm Tri-gate FinFET

Abstract

A thorough performance analysis of sub-10 nm gate-length Tri-gate Fin-FETs with gates having single material (SMG) and triple material (TMG) has been conducted through technology computer-aided design (TCAD) simulations for low-power applications. The gate of the TMG device is formed of three metals with distinct work functions. To decrease the drain-induced barrier lowering (DIBL) and increase transconductance, the gate work function near the source is higher than near the drain. The DC and analog/RF are obtained, analyzed, and compared between SMG and TMG devices. It is engrossing that, the device’s OFF current (I_OFF) is drastically reduced and the ON current (I_ON) is improved in the TMG structure leading to a better switching ratio. Also, TMG Tri-gate FinFET device structures provide an excellent peak transconductance of 5.1756 µA/V at V_GS = 0.16 V and V_DS = 0.1 V, output conductance of 7.45 µA/V at V_GS = 1 V, a subthreshold slope of 120 mV/decade at V_DS = 0.1 V, an I_ON/I_OFF ratio of 557.12 at V_DS = 0.1 V, and DIBL of 33 mV/V. Whereas the SMG Tri-gate FinFET has a peak transconductance of 4.28 µA/V at V_GS = 0.4 V and V_DS = 0.1 V, output conductance of 5.88 µA/V at V_GS = 1 V, a subthreshold slope of 300 mV/decade at V_DS = 0.1 V, an I_ON/I_OFF ratio of 21.29 at V_DS = 0.1 V, and DIBL of 55 mV/V.