Benchmarking and Validation of Sub-mW 30GHz VG-LNAs in 22nm FDSOI CMOS for 5G/6G Phased-Array Receivers

Domenico Zito, Michele Spasaro
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Abstract

Next-generation (5G/6G) wireless systems demand low-power mm-wave phased-array ICs. Variable-gain LNAs (VGLNAs) are key building blocks enabling hardware complexity reduction, performance enhancement and functionality extension. This paper reports a performance benchmarking of two low-power 30GHz VG-LNAs for phased-array ICs, which provide a 7.5dB gain control for 18dB Taylor taper in a 30GHz 8x8 antenna array, for a comprehensive validation of the new class of VGLNAs and its design methodology. In particular, this paper reports a second and implementation (VG-LNA2) with a reduced number (four) of gain-control back-gate voltages and super-low-Vt MOSFETs, with respect to the previous first implementation (VG-LNA1) with six gain-control back-gate voltages and regular- Vt MOSFETs, both in the same 22nm FDSOI CMOS technology. The results show that VG-LNA2 exhibits performance comparable to those of VG-LNA1, with a slightly lower power consumption. Overall, the performance benchmarking shows that the design methodology adopted for the new class of VG-LNAs leads to record low-power consumption and small form factor solutions reaching the targeted performances, regardless of the arrangements of the back-gate voltages for gain control and transistor sets, resulting in a comprehensive validation of the innovative design features and effective design methodology.
用于 5G/6G 相控阵接收器的 22nm FDSOI CMOS 30GHz VG-LNA 的基准测试和验证
下一代(5G/6G)无线系统需要低功耗毫米波相控阵集成电路。可变增益低噪声放大器(VGLNA)是降低硬件复杂性、提高性能和扩展功能的关键构件。本文报告了两个用于相控阵集成电路的低功耗 30GHzVG-LNA 的性能基准测试,这两个 VGLNA 为 30GHz 8x8 天线阵列中的 18dBTaylor 锥度提供了 7.5dB 增益控制,从而全面验证了新型 VGLNA 及其设计方法。本文特别报告了第二个实现方案(VG-LNA2),与之前的第一个实现方案(VG-LNA1)相比,减少了增益控制后栅极电压的数量(四个),采用超低 Vt MOSFET,采用六个增益控制后栅极电压和普通 Vt MOSFET,两者均采用相同的 22nm FDSOI CMOS 技术。总体而言,性能基准测试表明,无论增益控制和晶体管组的后栅极电压如何安排,新型 VG-LNA 采用的设计方法都能实现创纪录的低功耗和小外形尺寸解决方案,达到目标性能,从而全面验证了创新设计特性和有效设计方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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