Novel dynamic back-gate control technology for performance improvement in ultrathin double SOI LDMOS

Abstract

Novel performance improvement technology is developed for an ultrathin Double Silicon-on-Insulator (DSOI) Lateral Double-diffused Metal–Oxide–Semiconductor (LDMOS) with a heavy doping drift region, which is simulated using TCAD and an advanced application module for circuit analysis (CA-AAM). A peripheral circuit was proposed to dynamically control the independent back-gate electrode of the DSOI, with a zero bias for the ON-state and a negative bias for the OFF-state. A heavily doped drift region was designed to maintain a low specific on-resistance (R_on,sp), where a negative back-gate bias would induce positive charges to compensate for the heavily doped ionized acceptors. This results in an improved breakdown voltage (BV). Therefore, it rebuilds the traditional reduced surface field (RESURF) condition. Results indicate that the developed technology exhibits optimization in terms of the BV, R_on,sp, OFF-state leakage current, ON-state current, peak transconductance, cut-off frequency, turn-off time, Baliga’s figure of merits (BFOM), and figure of merits (FOM) when compared with the conventional RESURF technology.