DMWMNet: A novel dual-branch multi-level convolutional network for high-performance mixed-type wafer map defect detection in semiconductor manufacturing

Abstract

Wafer map defect detection plays an important role in semiconductor manufacturing by identifying root causes and accelerating process adjustments to ensure product quality and reduce unnecessary expenditures. However, existing methods have some limitations, such as low accuracy in mixed-type defect detection and poor recognition of similar defects and weak features. In this article, a novel dual-branch multi-level convolutional network (DMWMNet) is proposed for high-performance mixed-type wafer map defect detection. By fully considering the interrelationships between basic defects, defect number, and defect type, the network is designed to include two efficient parallel Branches and a Fusion classifier. Detecting defect types using basic defect discrimination and defect number detection is helpful for ameliorating problems with high complexity and low accuracy caused by multiple defect categories and feature overlaps. Furthermore, a composite loss function based on focal loss is employed to improve the network’s capacity to recognize weak features and similar defects. Experimental results on the MixedWM38 dataset show that DMWMNet has favorable mixed-type defect detection performance compared to other methods, with accuracy, precision, recall, F1 score, and MCC of 98.99%, 98.94%, 99.03%, 98.98%, and 98.97%, respectively.