{"title":"SI/GE Quantum Dot Channel FETs for Multi-Bit Computing","authors":"F. Jain, R. Gudlavalleti, J. Chandy, E. Heller","doi":"10.1142/s0129156424400767","DOIUrl":null,"url":null,"abstract":"This paper presents quantum dot channel (QDC) FETs in quantum wire and coupled quantum dot configurations for cryogenic operation with multi-state operation. It also describes gate-all-around (GAA) quantum dot channel (QDC) FETs that exhibit potential multi-state characteristics at room temperature. FETs with cladded Si and Ge quantum dot layers as a transport channel have been fabricated. The formation of a quantum dot superlattice (QDSL) when SiOx-cladded Si and/or GeOx-cladded Ge quantum dots (QD) are assembled results in mini-energy sub-bands in the conduction and valence band. The intra-mini-energy band transitions results in significant changes in the drain current when gate and/or drain voltages are varied. This novel feature provides a pathway for 16-/32-state logic in CMOS-X configuration. The gate-defined Si quantum dot FETs, comprising of tunnel barrier coupled, have been reported for quantum computing at cryogenic temperatures.","PeriodicalId":35778,"journal":{"name":"International Journal of High Speed Electronics and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of High Speed Electronics and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/s0129156424400767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents quantum dot channel (QDC) FETs in quantum wire and coupled quantum dot configurations for cryogenic operation with multi-state operation. It also describes gate-all-around (GAA) quantum dot channel (QDC) FETs that exhibit potential multi-state characteristics at room temperature. FETs with cladded Si and Ge quantum dot layers as a transport channel have been fabricated. The formation of a quantum dot superlattice (QDSL) when SiOx-cladded Si and/or GeOx-cladded Ge quantum dots (QD) are assembled results in mini-energy sub-bands in the conduction and valence band. The intra-mini-energy band transitions results in significant changes in the drain current when gate and/or drain voltages are varied. This novel feature provides a pathway for 16-/32-state logic in CMOS-X configuration. The gate-defined Si quantum dot FETs, comprising of tunnel barrier coupled, have been reported for quantum computing at cryogenic temperatures.
期刊介绍:
Launched in 1990, the International Journal of High Speed Electronics and Systems (IJHSES) has served graduate students and those in R&D, managerial and marketing positions by giving state-of-the-art data, and the latest research trends. Its main charter is to promote engineering education by advancing interdisciplinary science between electronics and systems and to explore high speed technology in photonics and electronics. IJHSES, a quarterly journal, continues to feature a broad coverage of topics relating to high speed or high performance devices, circuits and systems.