A Programming Model for Disaggregated Memory over CXL

Gal Assa, Michal Friedman, Ori Lahav
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Abstract

CXL (Compute Express Link) is an emerging open industry-standard interconnect between processing and memory devices that is expected to revolutionize the way systems are designed in the near future. It enables cache-coherent shared memory pools in a disaggregated fashion at unprecedented scales, allowing algorithms to interact with a variety of storage devices using simple loads and stores in a cacheline granularity. Alongside with unleashing unique opportunities for a wide range of applications, CXL introduces new challenges of data management and crash consistency. Alas, CXL lacks an adequate programming model, which makes reasoning about the correctness and expected behaviors of algorithms and systems on top of it nearly impossible. In this work, we present CXL0, the first programming model for concurrent programs running on top of CXL. We propose a high-level abstraction for CXL memory accesses and formally define operational semantics on top of that abstraction. We provide a set of general transformations that adapt concurrent algorithms to the new disruptive technology. Using these transformations, every linearizable algorithm can be easily transformed into its provably correct version in the face of a full-system or sub-system crash. We believe that this work will serve as the stepping stone for systems design and modelling on top of CXL, and support the development of future models as software and hardware evolve.
通过 CXL 分解内存的编程模型
CXL(Compute Express Link,计算高速链路)是一种新兴的处理和存储设备之间的开放式行业标准互连,有望在不久的将来彻底改变系统的设计方式。它能以前所未有的规模,以分解的方式实现高速缓存相干的共享存储器池,允许算法在高速缓存线粒度内使用简单的加载和存储与各种存储设备进行交互。CXL 在为各种应用提供独特机会的同时,也带来了数据管理和崩溃一致性的新挑战。遗憾的是,CXL 缺乏适当的编程模型,这使得在其基础上推理算法和系统的正确性和预期行为几乎不可能。在这项工作中,我们提出了 CXL0,这是第一个在 CXL 上运行的并发程序的编程模型。我们提出了 CXL 内存访问的高级抽象,并在该抽象之上正式定义了操作语义。我们提供了一系列通用转换,使并发算法适应新的颠覆性技术。利用这些转换,面对全系统或子系统崩溃,每个可线性化的算法都能轻松转换成其可证明的正确版本。我们相信,这项工作将成为在 CXL 基础上进行系统设计和建模的垫脚石,并随着软件和硬件的发展支持未来模型的开发。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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