{"title":"Design of an Alternative Hardware Abstraction Layer for Embedded Systems with Time-Controlled Hardware Access","authors":"Gabriel Simmann, Vinay Veeranna, Reiner Kriesten","doi":"10.4271/2024-01-2989","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel approach to the design of a Hardware Abstraction Layer (HAL) specifically tailored to embedded systems, placing a significant emphasis on time-controlled hardware access. The general concept and utilization of a HAL in industrial projects are widespread, serving as a well-established method in embedded systems development. HALs enhance application software portability, simplify underlying hardware usage by abstracting its inherent complexity and reduce overall development costs through software reusability. Beyond these established advantages, this paper introduces a conceptual framework that addresses critical challenges related to debugging and mitigates input-related problems often encountered in embedded systems. This becomes particularly pertinent in the automotive context, where the intricate operational environment of embedded systems demands robust solutions. The HAL design presented in this paper mitigates these issues. The design is structured as a modular software concept, leveraging the strategic use of configuration tables to provide an abstracted, rapid and well-organized method for configuring hardware. Furthermore, those configuration tables are used to realize an application-specific time-controlled synchronization mechanism between the actual hardware data registers and an internal software representation of those. The application software exclusively interacts with this representation, preventing errors arising from unstable inputs and ensuring strict timing. This paper provides a detailed description of the design, with a focus on its modular structure for an efficient and memory-saving implementation. Moreover, the document explores and discusses potential extensions and adaptations to the proposed design, enhancing its flexibility for individual use cases. In conclusion, this comprehensive exploration seeks to contribute to the advancement of embedded systems development by offering a refined and adaptable HAL design.","PeriodicalId":510086,"journal":{"name":"SAE Technical Paper Series","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"SAE Technical Paper Series","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4271/2024-01-2989","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a novel approach to the design of a Hardware Abstraction Layer (HAL) specifically tailored to embedded systems, placing a significant emphasis on time-controlled hardware access. The general concept and utilization of a HAL in industrial projects are widespread, serving as a well-established method in embedded systems development. HALs enhance application software portability, simplify underlying hardware usage by abstracting its inherent complexity and reduce overall development costs through software reusability. Beyond these established advantages, this paper introduces a conceptual framework that addresses critical challenges related to debugging and mitigates input-related problems often encountered in embedded systems. This becomes particularly pertinent in the automotive context, where the intricate operational environment of embedded systems demands robust solutions. The HAL design presented in this paper mitigates these issues. The design is structured as a modular software concept, leveraging the strategic use of configuration tables to provide an abstracted, rapid and well-organized method for configuring hardware. Furthermore, those configuration tables are used to realize an application-specific time-controlled synchronization mechanism between the actual hardware data registers and an internal software representation of those. The application software exclusively interacts with this representation, preventing errors arising from unstable inputs and ensuring strict timing. This paper provides a detailed description of the design, with a focus on its modular structure for an efficient and memory-saving implementation. Moreover, the document explores and discusses potential extensions and adaptations to the proposed design, enhancing its flexibility for individual use cases. In conclusion, this comprehensive exploration seeks to contribute to the advancement of embedded systems development by offering a refined and adaptable HAL design.
本文提出了一种专为嵌入式系统设计的硬件抽象层(HAL)的新方法,重点强调时间控制的硬件访问。HAL 的一般概念和在工业项目中的应用非常广泛,是嵌入式系统开发中一种行之有效的方法。HAL 增强了应用软件的可移植性,通过抽象其固有的复杂性简化了底层硬件的使用,并通过软件的可重用性降低了整体开发成本。除了这些公认的优势外,本文还介绍了一种概念框架,可解决与调试相关的关键挑战,并减轻嵌入式系统中经常遇到的与输入相关的问题。这在汽车领域尤为重要,因为嵌入式系统错综复杂的运行环境需要稳健的解决方案。本文介绍的 HAL 设计可以缓解这些问题。该设计采用模块化软件概念,利用配置表的战略性使用,提供了一种抽象、快速和有序的硬件配置方法。此外,这些配置表还用于实现实际硬件数据寄存器与这些寄存器的内部软件表示之间的特定应用时间控制同步机制。应用软件专门与该表示法进行交互,防止因输入不稳定而产生错误,并确保严格的定时。本文详细介绍了这一设计,重点是其模块化结构,以实现高效和节省内存。此外,本文还探讨和讨论了对拟议设计的潜在扩展和调整,以增强其针对个别用例的灵活性。总之,这一全面的探讨旨在通过提供一种精炼且可调整的 HAL 设计,为嵌入式系统开发的进步做出贡献。