{"title":"Performance Improvement of Degrading Memristor-Bridge-Based Multilayer Neural Network with Refresh Pulses","authors":"Aalvee Asad Kausani, Caiwen Ding, Mehdi Anwar","doi":"10.1142/s0129156424400561","DOIUrl":null,"url":null,"abstract":"Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation.","PeriodicalId":35778,"journal":{"name":"International Journal of High Speed Electronics and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of High Speed Electronics and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/s0129156424400561","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0
Abstract
Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation.
期刊介绍:
Launched in 1990, the International Journal of High Speed Electronics and Systems (IJHSES) has served graduate students and those in R&D, managerial and marketing positions by giving state-of-the-art data, and the latest research trends. Its main charter is to promote engineering education by advancing interdisciplinary science between electronics and systems and to explore high speed technology in photonics and electronics. IJHSES, a quarterly journal, continues to feature a broad coverage of topics relating to high speed or high performance devices, circuits and systems.