Localized Epitaxial Growth of 402 V Breakdown Voltage Quasi‐Vertical GaN‐on‐Si p‐n Diode on 200 mm‐Diameter Wafers

Thomas Kaltsounis, Mohammed El Amrani, David Plaza Arguello, Hala El Rammouz, Vishwajeet Maurya, M. Lafossas, Simona Torrengo, Helge Haas, Laurent Mendizabal, Alain Gueugnot, Denis Mariolle, Thomas Jalabert, Julien Buckley, Yvon Cordier, Matthew Charles
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Abstract

Localized epitaxy of gallium nitride (GaN) on silicon (Si) wafers is an efficient way to relax elastically the tensile stress generated in the GaN layer after growth, allowing epitaxy of thick layers for the fabrication of vertical power devices operating at high voltage. In this study, a 4.7 μm‐thick GaN layer is grown by metal–organic vapor phase epitaxy on 200 mm‐diameter Si wafers for the fabrication of quasi‐vertical Schottky and p‐n diodes. The uniformity of the doping concentration in the layer is mapped spatially by scanning spreading resistance microscopy, while scanning capacitance microscopy illustrates the differently doped regions in the p‐n diode. The net doping concentration is extracted by capacitance–voltage (C–V) measurements and it is found to be about 3 × 1016 cm−3. On a 140 μm‐diameter quasi‐vertical p‐n diode, destructive breakdown occurs at 402 V, with no periphery protection on the device, demonstrating that localized epitaxy of GaN on Si has great potential for vertical high‐power devices.
在直径 200 毫米晶片上局部外延生长击穿电压为 402 V 的准垂直硅基氮化镓 p-n 二极管
在硅(Si)晶片上进行氮化镓(GaN)的局部外延是一种有效的方法,可以弹性地放松氮化镓层在生长后产生的拉伸应力,从而外延出厚厚的层,用于制造在高电压下工作的垂直功率器件。本研究在直径为 200 毫米的硅晶片上通过金属有机气相外延生长了 4.7 μm 厚的氮化镓层,用于制造准垂直肖特基二极管和 p-n 二极管。通过扫描展阻显微镜绘制了层中掺杂浓度的空间均匀性,而扫描电容显微镜则显示了 p-n 二极管中不同的掺杂区域。通过电容-电压(C-V)测量提取出的净掺杂浓度约为 3 × 1016 cm-3。在一个直径为 140 μm 的准垂直 p-n 二极管上,破坏性击穿发生在 402 V 的电压下,器件的外围没有任何保护措施,这表明氮化镓在硅上的局部外延在垂直大功率器件方面具有巨大的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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