Ultra-Efficient Low-Power Retinal Nano Electronic Circuit for Edge Enhancement and Detection Using 7 nm FinFET Technology

IF 0.6 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
Md Turiqul Islam, A. Al-Shidaifat, Mohammad Khaleqi Qaleh Jooq, Hanjung Song
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Abstract

This study proposed a 7 nm FinFET based analog one pixel circuit block inspired by lateral inhibition phenomenon to perform edge enhancing and edge detection of optoelectronic image. This plays a crucial role in retinomorphic applications like artificial human retinal functions. Proposed Edge enhancement and edge detection circuits are constructed using two distinct 750×750-pixel silicon networks. First the single pixel circuit cell is reconstructed with the lateral inhibition phenomenon, then the circuit using GPDK (Generic Process Design Kit) in 180 nm, 90 nm, and 45 nm CMOS technology is designed. We used 3×3 convolution process for image masking in digital and analog image signal processing which gives more accuracy in term of object recognition. The power consumption in each case is obtained to be approximately 19.71 μW, 4.18 μW and 1.62 μW for edge enhancing and 23.76 μW, 7.99 μW and 3.41 μW for edge detection which is much larger than the power consumed by the same circuit is implemented with 7 nm FinFET (Fin Field Effect Transistor) technology, 21.91 pW and 24.85 pW. In addition, the size reduction of the circuit reduced by 84% compared with 45 nm CMOS, increases the accuracy of the circuit by 30%. Results confirm that FinFET based single pixel circuit consumes less power, reduces size, and gives higher accuracy. The output from all the circuits has been matched with the biological response.
利用 7 纳米 FinFET 技术实现边缘增强和检测的超高效低功耗视网膜纳米电子电路
本研究受横向抑制现象的启发,提出了一种基于 7 纳米 FinFET 的模拟单像素电路块,用于执行光电图像的边缘增强和边缘检测。这在人工视网膜功能等视网膜形态应用中起着至关重要的作用。所提出的边缘增强和边缘检测电路是利用两个不同的 750×750 像素硅网络构建的。首先利用横向抑制现象重建单像素电路单元,然后利用 GPDK(通用工艺设计工具包)在 180 纳米、90 纳米和 45 纳米 CMOS 技术上设计电路。在数字和模拟图像信号处理中,我们使用 3×3 卷积过程进行图像遮蔽,从而提高了物体识别的准确性。在每种情况下,边缘增强的功耗分别约为 19.71 μW、4.18 μW 和 1.62 μW,边缘检测的功耗分别约为 23.76 μW、7.99 μW 和 3.41 μW,远大于采用 7 nm FinFET(鳍式场效应晶体管)技术实现的相同电路的功耗(21.91 pW 和 24.85 pW)。此外,与 45 纳米 CMOS 相比,电路尺寸缩小了 84%,精度提高了 30%。结果证实,基于 FinFET 的单像素电路功耗更低、体积更小、精度更高。所有电路的输出都与生物反应相匹配。
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来源期刊
Journal of Nanoelectronics and Optoelectronics
Journal of Nanoelectronics and Optoelectronics 工程技术-工程:电子与电气
自引率
16.70%
发文量
48
审稿时长
12.5 months
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