Design and implementation of power and area efficient architectures of circular symmetry 2-D FIR filters using CSOA-based CSD

Abstract

An efficient 2-D Finite Impulse Response (FIR) filter is designed using modified McClellan transformations with optimized coefficients. The P3 transformation is considered to attain sharp circular symmetry filters to reduce the complexity of the architecture of the 2-D FIR filter. The filter coefficients are represented in Canonical Signed Digit (CSD) space to construct the filter architecture by multiplierless design. The CSD representation is optimized using the Cuckoo Search Algorithm (CSA) with fitness function Mean Square Error (MSE). Further, a Fully Direct (FD) type architecture of a 2-D FIR filter is implemented according to the obtained CSD-based coefficients for the length of \(N\times N =11 \times 11\). Each row filter structure is realized and explored. All the hardware structures of row filters were realized and integrated using Verilog HDL and synthesized by Genus tools provided by the CADENCE Vendor in a 45 nm CMOS generic library. The area, delay, and power reports are generated by this synthesis tool and compared with the existing 2-D FIR filter architectures. The area, power, and delay values of the proposed filter architecture are decreased by 28.9%, 49.59%, and 36.02%, respectively to the conventional filter architecture. The Power-Delay-Product (PDP) and Area-Delay-Product (ADP) values of the proposed filter architecture are reduced by a minimum of 2.14 and 1.96 times, and a maximum of 4.31 and 66 times to the existing filter architectures respectively.