Optimizing time resolution and power consumption in a current-mode circuit for SiPMs

R. Manera, S. Gómez, A. Mariscal-Castilla, J. Mauricio, R. Ballabriga, D. Gascón
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Abstract

Several applications that employ SiPMs require high time precision readout electronics. This work presents a study for the optimization of timing resolution of readout electronics for SiPMs focused on the effect of sensor area, transistor scaling and power consumption on electronic jitter. The design of the most critical stages are presented, specially the front-end input stage in current-mode. The performance of three different technologies (180, 130 and 65 nm) are studied. 65 nm is the best option to obtain good timing resolution with less power consumption. Dividing the sensor into smaller segments improves the Single Photon Electronics Jitter (SPEJ), but does not translate into a better Coincidence Time Resolution (CTR) when keeping the power per unit area constant, performing analog summation or employing an averaging algorithm of the time stamps for small LSO:Ce:%0.2Ca scintillator crystal.
优化 SiPM 电流模式电路的时间分辨率和功耗
一些采用 SiPM 的应用需要高时间精度的读出电子设备。本研究介绍了如何优化 SiPM 读出电子器件的时间分辨率,重点是传感器面积、晶体管规模和功耗对电子抖动的影响。研究介绍了最关键级的设计,特别是电流模式的前端输入级。研究了三种不同技术(180、130 和 65 纳米)的性能。65 纳米是以较低功耗获得良好定时分辨率的最佳选择。将传感器分成较小的部分可以改善单光子电子抖动(SPEJ),但在保持单位面积功率不变、执行模拟求和或采用小型 LSO:Ce:%0.2Ca 闪烁晶体时间戳平均算法的情况下,并不能转化为更好的重合时间分辨率(CTR)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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