A Transferable GNN-based Multi-Corner Performance Variability Modeling for Analog ICs

Hongjian Zhou, Yaguang Li, Xin Xiong, Pingqiang Zhou
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Abstract

Performance variability appears strong-nonlinear in analog ICs due to large process variations in advanced technologies. To capture such variability, a vast amount of data is required for learning-based accurate models. On the other hand, yield estimation across multiple PVT corners exacerbates data dimensionality further. In this paper, we propose a graph neural network (GNN)-based performance variability modeling method. The key idea is to leverage GNN techniques to extract variations-related local mismatch in analog circuits, and data efficiency is benefited by the ability of knowledge transfer among different PVT corners. Demonstrated upon three circuits in a commercial 65nm CMOS process and compared with the state-of-the-art modeling techniques, our method can achieve higher modeling accuracy while utilizing significantly less training data.
基于可转移 GNN 的模拟集成电路多角度性能变异性建模
由于先进技术的工艺差异较大,模拟集成电路的性能变化呈现出强烈的非线性特征。要捕捉这种变异性,就需要大量数据来建立基于学习的精确模型。另一方面,跨多个 PVT 角的良率估计进一步加剧了数据维度。在本文中,我们提出了一种基于图神经网络(GNN)的性能变异性建模方法。其主要思路是利用图神经网络技术提取模拟电路中与变异相关的局部失配,并通过不同 PVT 角之间的知识转移能力提高数据效率。通过对商用 65nm CMOS 工艺中的三个电路进行演示,并与最先进的建模技术进行比较,我们的方法可以实现更高的建模精度,同时大大减少训练数据的使用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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