Analysis and Simulation of Current Balancer Circuit for Phase-Gain Correction of Unbalanced Differential Signals

Abstract

The phase and gain imbalance of a balun output can be adjusted by a differential current balancer (DCB) circuit. The performance of DCB circuit, for correcting the phase (gain) imbalance, is analyzed for a wide range of input signal level, and the accuracy is verified with circuit simulation. To illustrate the phase-error/gain-error (PE/GE) correction, a 30–40$$GHz DCB circuit is designed and simulated in a 180-nm CMOS process. The DCB is examined for input PE, $\mathrm{\Delta }{𝜃}_A$, of $-20^{\circ }\le \mathrm{\Delta }{𝜃}_A\le +20^{\circ }$ and input GE, G_A, of $-2\mathrm{\text{dB}}\le 20^{\ast }log(1+G_A)\le +2$$$dB. Analysis and simulation illustrate an output phase error $({\mathrm{\text{OPE}}}_{\mathrm{\text{DCB}}})$ of $-10^{\circ }\le {\mathrm{\text{OPE}}}_{\mathrm{\text{DCB}}}\le +2^{\circ }$ and output gain error $({\mathrm{\text{OGE}}}_{\mathrm{\text{DCB}}})$ of $-1\mathrm{\text{dB}}\le {\mathrm{\text{OGE}}}_{\mathrm{\text{DCB}}}\le +1.5$$$dB, over frequency range of 20–50$$GHz. The results of DCB circuit for PE (GE) compensation are compared to that of phase-correction technique (PCT) circuit, illustrating the superior phase (gain) imbalance correction of the DCB circuit with lower NF and DC power consumption.