Kaifang Weng, Changsheng Shen, Zhaofu Chen, Ningfeng Bai
{"title":"Investigation of silicon-on-insulator back-gate nano vacuum channel transistor array","authors":"Kaifang Weng, Changsheng Shen, Zhaofu Chen, Ningfeng Bai","doi":"10.1116/6.0003346","DOIUrl":null,"url":null,"abstract":"Recent advances in nanofabrication have made it possible to combine planar solid-state devices with vacuum electronics to create planar nano vacuum channel transistors that offer the advantages of cold-field emission and ballistic transmission. However, the current research is mainly limited to the study of a single field emission transistor, which has problems such as low current and poor gate control capability. To solve the above problems, a multitip field emission array is used in this work, and gate modulation is performed by a back-gate structure to fabricate and process a back-gate nano vacuum transistor array. First, we conducted simulation modeling of the back-gate nano vacuum transistor, investigated the impact of its structural parameters on its performance, and obtained the optimal simulation results. Then, structural parameters of the back-gate nano vacuum channel transistor array (BG-NVCTA) are selected based on the simulation results and fabricated by electron beam lithography on the silicon wafer. The experimental results, agreed well with the simulation results, show that the BG-NVCTA device has excellent gate control characteristics and a high current density. Its anode current is greater than 5 μA, and the transconductance is 1.05 μS when the anode voltage is 5 V.","PeriodicalId":282302,"journal":{"name":"Journal of Vacuum Science & Technology B","volume":"66 3","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Vacuum Science & Technology B","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1116/6.0003346","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Recent advances in nanofabrication have made it possible to combine planar solid-state devices with vacuum electronics to create planar nano vacuum channel transistors that offer the advantages of cold-field emission and ballistic transmission. However, the current research is mainly limited to the study of a single field emission transistor, which has problems such as low current and poor gate control capability. To solve the above problems, a multitip field emission array is used in this work, and gate modulation is performed by a back-gate structure to fabricate and process a back-gate nano vacuum transistor array. First, we conducted simulation modeling of the back-gate nano vacuum transistor, investigated the impact of its structural parameters on its performance, and obtained the optimal simulation results. Then, structural parameters of the back-gate nano vacuum channel transistor array (BG-NVCTA) are selected based on the simulation results and fabricated by electron beam lithography on the silicon wafer. The experimental results, agreed well with the simulation results, show that the BG-NVCTA device has excellent gate control characteristics and a high current density. Its anode current is greater than 5 μA, and the transconductance is 1.05 μS when the anode voltage is 5 V.