{"title":"Implementation of Fuzzy Logic Controller Algorithms with MF optimization on FPGA","authors":"Samet Ahmed, Kourd Yahia","doi":"10.19139/soic-2310-5070-1790","DOIUrl":null,"url":null,"abstract":"In this work, we propose the design and implementation of a parallel-structured fuzzy logic controller with integral action and anti-windup. The Grey Wolf Optimization (GWO) optimization technique is used to optimize fuzzy rules, which allows for the complicated algebraic ideas of type 1 fuzzy logic algorithms to be reduced to straightforward numerical equations for FPGA target implementation. The techniques for operating a geared DC motor are optimized by the membership function structure of our controller's data propagation. Our proposed controller was implemented in Xilinx System Generator (XSG) and co-simulated on hardware and software with VIVADO and XSG tools.","PeriodicalId":131002,"journal":{"name":"Statistics, Optimization & Information Computing","volume":"32 3","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2023-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Statistics, Optimization & Information Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.19139/soic-2310-5070-1790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this work, we propose the design and implementation of a parallel-structured fuzzy logic controller with integral action and anti-windup. The Grey Wolf Optimization (GWO) optimization technique is used to optimize fuzzy rules, which allows for the complicated algebraic ideas of type 1 fuzzy logic algorithms to be reduced to straightforward numerical equations for FPGA target implementation. The techniques for operating a geared DC motor are optimized by the membership function structure of our controller's data propagation. Our proposed controller was implemented in Xilinx System Generator (XSG) and co-simulated on hardware and software with VIVADO and XSG tools.