Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs

IF 1.5 3区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Khalid Ahmad, Cris Cecka, Michael Garland, Mary Hall
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引用次数: 0

Abstract

An important sparse tensor computation is sparse-tensor-dense-matrix multiplication (SpTM), which is used in tensor decomposition and applications. SpTM is a multi-dimensional analog to sparse-matrix-dense-matrix multiplication (SpMM). In this paper, we employ a hierarchical tensor data layout that can unfold a multidimensional tensor to derive a 2D matrix, making it possible to compute SpTM using SpMM kernel implementations for GPUs. We compare two SpMM implementations to the state-of-the-art PASTA sparse tensor contraction implementation using: (1) SpMM with hierarchical tensor data layout; and, (2) unfolding followed by an invocation of cuSPARSE’s SpMM. Results show that SpMM can outperform PASTA 70.9% of the time, but none of the three approaches is best overall. Therefore, we use a decision tree classifier to identify the best performing sparse tensor contraction kernel based on precomputed properties of the sparse tensor.

探索 GPU 上稀疏张量倍密集矩阵的数据布局
一种重要的稀疏张量计算是稀疏-张量-密集-矩阵乘法(SpTM),它用于张量分解和应用。SpTM 是稀疏矩阵-密集矩阵乘法(SpMM)的多维类比。在本文中,我们采用了分层张量数据布局,这种布局可以展开多维张量,推导出二维矩阵,从而可以使用 GPU 的 SpMM 内核实现来计算 SpTM。我们将两种 SpMM 实现与最先进的 PASTA 稀疏张量收缩实现进行了比较:(1) 采用分层张量数据布局的 SpMM;(2) 展开后调用 cuSPARSE 的 SpMM。结果表明,SpMM 在 70.9% 的情况下优于 PASTA,但这三种方法总体上都不是最好的。因此,我们使用决策树分类器,根据预先计算的稀疏张量属性,确定性能最佳的稀疏张量收缩核。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization 工程技术-计算机:理论方法
CiteScore
3.60
自引率
6.20%
发文量
78
审稿时长
6-12 weeks
期刊介绍: ACM Transactions on Architecture and Code Optimization (TACO) focuses on hardware, software, and system research spanning the fields of computer architecture and code optimization. Articles that appear in TACO will either present new techniques and concepts or report on experiences and experiments with actual systems. Insights useful to architects, hardware or software developers, designers, builders, and users will be emphasized.
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