Increasing the Robustness of TERO-TRNGs against Process Variation

IF 3.1 4区计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

ACM Transactions on Reconfigurable Technology and Systems Pub Date : 2023-05-23 DOI:https://dl.acm.org/doi/10.1145/3597418

Christian Skubich, Peter Reichel, Marc Reichenbach

引用次数: 0

Abstract

The Transition Effect Ring Oscillator (TERO) is a popular design for building entropy sources because it is compact, built from digital elements only and is very well suited for FPGAs. However, it is known to be very sensitive to process variation. While the latter is useful for building Physical Unclonable Functions, it is interfering with the application as entropy source.

In this paper, we investigate an approach to increase reliability. We show that adding a third stage eliminates much of the susceptibility to process variation and how a resulting GHz oscillation can be evaluated on an FPGA. The design is supported by physical and stochastic modeling. The physical model is validated using an experiment with dynamically reconfigurable LUTs.

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提高tero - trng对工艺变化的鲁棒性

过渡效应环振荡器(TERO)是构建熵源的一种流行设计，因为它结构紧凑，仅由数字元件构建，非常适合fpga。然而，众所周知，它对工艺变化非常敏感。虽然后者对于构建物理不可克隆函数很有用，但它作为熵源干扰了应用程序。在本文中，我们研究了一种提高可靠性的方法。我们表明，增加第三级消除了对工艺变化的大部分敏感性，以及如何在FPGA上评估由此产生的GHz振荡。该设计得到了物理和随机模型的支持。通过动态可重构lut实验对物理模型进行了验证。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ACM Transactions on Reconfigurable Technology and Systems COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-

CiteScore

4.90

自引率

8.70%

发文量

审稿时长

>12 weeks

期刊介绍： TRETS is the top journal focusing on research in, on, and with reconfigurable systems and on their underlying technology. The scope, rationale, and coverage by other journals are often limited to particular aspects of reconfigurable technology or reconfigurable systems. TRETS is a journal that covers reconfigurability in its own right. Topics that would be appropriate for TRETS would include all levels of reconfigurable system abstractions and all aspects of reconfigurable technology including platforms, programming environments and application successes that support these systems for computing or other applications. -The board and systems architectures of a reconfigurable platform. -Programming environments of reconfigurable systems, especially those designed for use with reconfigurable systems that will lead to increased programmer productivity. -Languages and compilers for reconfigurable systems. -Logic synthesis and related tools, as they relate to reconfigurable systems. -Applications on which success can be demonstrated. The underlying technology from which reconfigurable systems are developed. (Currently this technology is that of FPGAs, but research on the nature and use of follow-on technologies is appropriate for TRETS.) In considering whether a paper is suitable for TRETS, the foremost question should be whether reconfigurability has been essential to success. Topics such as architecture, programming languages, compilers, and environments, logic synthesis, and high performance applications are all suitable if the context is appropriate. For example, an architecture for an embedded application that happens to use FPGAs is not necessarily suitable for TRETS, but an architecture using FPGAs for which the reconfigurability of the FPGAs is an inherent part of the specifications (perhaps due to a need for re-use on multiple applications) would be appropriate for TRETS.