Path-Based Multicast Routing for Network-on-Chip of the Neuromorphic Processor

Abstract

Network-on-Chip (NoC) is widely adopted in neuromorphic processors to support communication between neurons in spiking neural networks (SNNs). However, SNNs generate enormous spiking packets due to the one-to-many traffic pattern. The spiking packets may cause communication pressure on NoC. We propose a path-based multicast routing method to alleviate the pressure. Firstly, all destination nodes of each source node on NoC are divided into several clusters. Secondly, multicast paths in the clusters are created based on the Hamiltonian path algorithm. The proposed routing can reduce the length of path and balance the communication load of each router. Lastly, we design a lightweight microarchitecture of NoC, which involves a customized multicast packet and a routing function. We use six datasets to verify the proposed multicast routing. Compared with unicast routing, the running time of path-based multicast routing achieves 5.1x speedup, and the number of hops and the maximum transmission latency of path-based multicast routing are reduced by 68.9% and 77.4%, respectively. The maximum length of path is reduced by 68.3% and 67.2% compared with the dual-path (DP) and multi-path (MP) multicast routing, respectively. Therefore, the proposed multicast routing has improved performance in terms of average latency and throughput compared with the DP or MP multicast routing.