A distributed algorithm to schedule TSCH links under the SINR model

IF 0.9 4区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
José Carlos da Silva, Flávio Assis
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引用次数: 5

Abstract

Industrial environments are typically characterised by high levels of interference. Therefore, standards for industrial wireless sensor networks (WirelessHART, ISA 100.11a, and IEEE 802.15.4e) have defined a time division and multichannel-based mode of operation, in which pairs of time slots and channels are assigned to links representing communication between nodes. In IEEE 802.15.4e this mode of operation is called Timed Slotted Channel Hopping. In this paper we describe a distributed algorithm to define such an assignment for a given network. The algorithm is efficient, scalable and was developed for the Signal-to-Interference-plus-Noise-Ratio model, currently considered the most appropriate to analyse algorithms for wireless networks when interference is taken into consideration. In particular, the algorithm provides deterministic communication in the network. Previous approaches to this problem are mainly centralised, based on a simple (or none) interference model, do not provide deterministic communication or do not consider multiple physical channels. In this paper we describe the algorithm and present results of simulation, where we evaluated the number of rounds needed for computing the schedules and the size of the produced schedules. The described algorithm applies also to the Internet of Things, characterised by high scale and presence of interference.
一种在SINR模型下调度TSCH链路的分布式算法
工业环境的典型特点是高水平的干扰。因此,工业无线传感器网络的标准(WirelessHART、ISA 100.11a和IEEE 802.15.4e)定义了一种分时和基于多信道的操作模式,其中对时隙和信道被分配给代表节点之间通信的链路。在IEEE 802.15.4e中,这种操作模式被称为定时槽跳频。在本文中,我们描述了一种分布式算法来定义给定网络的这种分配。该算法是高效的,可扩展的,并且是为信号-干扰-噪声比模型开发的,目前被认为是最适合分析无线网络中考虑干扰时的算法。特别是,该算法在网络中提供了确定性通信。以前解决这个问题的方法主要是集中的,基于一个简单的(或无)干扰模型,不提供确定性通信或不考虑多个物理通道。在本文中,我们描述了该算法并给出了仿真结果,其中我们评估了计算调度所需的轮数和生成调度的大小。所描述的算法也适用于物联网,其特点是高规模和存在干扰。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Design Automation for Embedded Systems
Design Automation for Embedded Systems 工程技术-计算机:软件工程
CiteScore
2.60
自引率
0.00%
发文量
10
审稿时长
>12 weeks
期刊介绍: Embedded (electronic) systems have become the electronic engines of modern consumer and industrial devices, from automobiles to satellites, from washing machines to high-definition TVs, and from cellular phones to complete base stations. These embedded systems encompass a variety of hardware and software components which implement a wide range of functions including digital, analog and RF parts. Although embedded systems have been designed for decades, the systematic design of such systems with well defined methodologies, automation tools and technologies has gained attention primarily in the last decade. Advances in silicon technology and increasingly demanding applications have significantly expanded the scope and complexity of embedded systems. These systems are only now becoming possible due to advances in methodologies, tools, architectures and design techniques. Design Automation for Embedded Systems is a multidisciplinary journal which addresses the systematic design of embedded systems, focusing primarily on tools, methodologies and architectures for embedded systems, including HW/SW co-design, simulation and modeling approaches, synthesis techniques, architectures and design exploration, among others. Design Automation for Embedded Systems offers a forum for scientist and engineers to report on their latest works on algorithms, tools, architectures, case studies and real design examples related to embedded systems hardware and software. Design Automation for Embedded Systems is an innovative journal which distinguishes itself by welcoming high-quality papers on the methodology, tools, architectures and design of electronic embedded systems, leading to a true multidisciplinary system design journal.
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